src/Pure/logic.ML
changeset 3915 0eb9b9dd4de6
parent 3893 5a1f22e7b359
child 3963 29c5ec9ecbaa
     1.1 --- a/src/Pure/logic.ML	Fri Oct 17 11:09:34 1997 +0200
     1.2 +++ b/src/Pure/logic.ML	Fri Oct 17 11:10:13 1997 +0200
     1.3 @@ -364,7 +364,7 @@
     1.4  fun looptest sign prems lhs rhs =
     1.5     is_Var (head_of lhs)
     1.6    orelse
     1.7 -   (exists (apl (lhs,occs)) (rhs :: prems))
     1.8 +   (exists (apl (lhs, op occs)) (rhs :: prems))
     1.9    orelse
    1.10     (null prems andalso
    1.11      Pattern.matches (#tsig (Sign.rep_sg sign)) (lhs, rhs));