src/Pure/sign.ML
changeset 171 ab0f93a291b5
parent 169 1b2765146aab
child 197 7c7179e687b2
     1.1 --- a/src/Pure/sign.ML	Tue Nov 30 10:55:43 1993 +0100
     1.2 +++ b/src/Pure/sign.ML	Tue Nov 30 11:04:07 1993 +0100
     1.3 @@ -132,12 +132,6 @@
     1.4      (*read and check the type mentioned in a const declaration; zero type var
     1.5        indices because type inference requires it*)
     1.6  
     1.7 -    (* FIXME bug / feature: varifyT'ed TFrees may clash with user specified
     1.8 -      TVars e.g. foo :: "'a => ?'a" *)
     1.9 -    (* FIXME if user supplied TVars were disallowed, zero_tvar_indices would
    1.10 -      become obsolete *)
    1.11 -    (* FIXME disallow "" as const name *)
    1.12 -
    1.13      fun read_consts tsg sy (cs, s) =
    1.14        let val ty = zero_tvar_indices (Type.varifyT (read_typ tsg sy s));
    1.15        in
    1.16 @@ -164,7 +158,6 @@
    1.17  
    1.18      val const_decs' =
    1.19        map (read_consts tsig' syn') (Syntax.constants sext @ const_decs);
    1.20 -                    (* FIXME ^^^^ should be syn *)
    1.21    in
    1.22      Sg {
    1.23        tsig = tsig',
    1.24 @@ -191,7 +184,7 @@
    1.25    (Syntax.syntax_types, 0)],
    1.26   [(["fun"],  ([["logic"], ["logic"]], "logic")),
    1.27    (["prop"], ([], "logic"))],
    1.28 - [([Syntax.constrainC], "'a::logic => 'a")],  (* FIXME replace logic by {} (?) *)
    1.29 + [([Syntax.constrainC], "'a::logic => 'a")],
    1.30   Some Syntax.pure_sext);
    1.31  
    1.32