src/Sequents/simpdata.ML
changeset 58963 26bf09b95dda
parent 58957 c9e744ea8a38
child 59498 50b60f501b05
equal deleted inserted replaced
58960:4bee6d8c1500 58963:26bf09b95dda
    56 
    56 
    57 val triv_rls = [@{thm FalseL}, @{thm TrueR}, @{thm basic}, @{thm refl},
    57 val triv_rls = [@{thm FalseL}, @{thm TrueR}, @{thm basic}, @{thm refl},
    58   @{thm iff_refl}, reflexive_thm];
    58   @{thm iff_refl}, reflexive_thm];
    59 
    59 
    60 fun unsafe_solver ctxt =
    60 fun unsafe_solver ctxt =
    61   FIRST' [resolve_tac (triv_rls @ Simplifier.prems_of ctxt), assume_tac];
    61   FIRST' [resolve_tac (triv_rls @ Simplifier.prems_of ctxt), assume_tac ctxt];
    62 
    62 
    63 (*No premature instantiation of variables during simplification*)
    63 (*No premature instantiation of variables during simplification*)
    64 fun safe_solver ctxt =
    64 fun safe_solver ctxt =
    65   FIRST' [fn i => DETERM (match_tac ctxt (triv_rls @ Simplifier.prems_of ctxt) i),
    65   FIRST' [fn i => DETERM (match_tac ctxt (triv_rls @ Simplifier.prems_of ctxt) i),
    66     eq_assume_tac];
    66     eq_assume_tac];