src/HOL/Decision_Procs/mir_tac.ML
changeset 30224 79136ce06bdb
parent 30034 60f64f112174
child 30242 aea5d7fa7ef5
equal deleted inserted replaced
30207:c56d27155041 30224:79136ce06bdb
    44 val mod_div_equality' = @{thm "mod_div_equality'"};
    44 val mod_div_equality' = @{thm "mod_div_equality'"};
    45 val split_div' = @{thm "split_div'"};
    45 val split_div' = @{thm "split_div'"};
    46 val Suc_plus1 = @{thm "Suc_plus1"};
    46 val Suc_plus1 = @{thm "Suc_plus1"};
    47 val imp_le_cong = @{thm "imp_le_cong"};
    47 val imp_le_cong = @{thm "imp_le_cong"};
    48 val conj_le_cong = @{thm "conj_le_cong"};
    48 val conj_le_cong = @{thm "conj_le_cong"};
    49 val nat_mod_add_eq = @{thm "mod_add1_eq"} RS sym;
    49 val mod_add_eq = @{thm "mod_add_eq"} RS sym;
    50 val mod_add_left_eq = @{thm "mod_add_left_eq"} RS sym;
    50 val mod_add_left_eq = @{thm "mod_add_left_eq"} RS sym;
    51 val mod_add_right_eq = @{thm "mod_add_right_eq"} RS sym;
    51 val mod_add_right_eq = @{thm "mod_add_right_eq"} RS sym;
    52 val int_mod_add_eq = @{thm "mod_add_eq"} RS sym;
       
    53 val nat_div_add_eq = @{thm "div_add1_eq"} RS sym;
    52 val nat_div_add_eq = @{thm "div_add1_eq"} RS sym;
    54 val int_div_add_eq = @{thm "zdiv_zadd1_eq"} RS sym;
    53 val int_div_add_eq = @{thm "zdiv_zadd1_eq"} RS sym;
    55 val ZDIVISION_BY_ZERO_MOD = @{thm "DIVISION_BY_ZERO"} RS conjunct2;
    54 val ZDIVISION_BY_ZERO_MOD = @{thm "DIVISION_BY_ZERO"} RS conjunct2;
    56 val ZDIVISION_BY_ZERO_DIV = @{thm "DIVISION_BY_ZERO"} RS conjunct1;
    55 val ZDIVISION_BY_ZERO_DIV = @{thm "DIVISION_BY_ZERO"} RS conjunct1;
    57 
    56 
    92     val thy = ProofContext.theory_of ctxt
    91     val thy = ProofContext.theory_of ctxt
    93     (* Transform the term*)
    92     (* Transform the term*)
    94     val (t,np,nh) = prepare_for_mir thy q g
    93     val (t,np,nh) = prepare_for_mir thy q g
    95     (* Some simpsets for dealing with mod div abs and nat*)
    94     (* Some simpsets for dealing with mod div abs and nat*)
    96     val mod_div_simpset = HOL_basic_ss 
    95     val mod_div_simpset = HOL_basic_ss 
    97                         addsimps [refl,nat_mod_add_eq, 
    96                         addsimps [refl, mod_add_eq, 
    98                                   @{thm "mod_self"}, @{thm "zmod_self"},
    97                                   @{thm "mod_self"}, @{thm "zmod_self"},
    99                                   @{thm "zdiv_zero"},@{thm "zmod_zero"},@{thm "div_0"}, @{thm "mod_0"},
    98                                   @{thm "zdiv_zero"},@{thm "zmod_zero"},@{thm "div_0"}, @{thm "mod_0"},
   100                                   @{thm "div_by_1"}, @{thm "mod_by_1"}, @{thm "div_1"}, @{thm "mod_1"},
    99                                   @{thm "div_by_1"}, @{thm "mod_by_1"}, @{thm "div_1"}, @{thm "mod_1"},
   101                                   @{thm "Suc_plus1"}]
   100                                   @{thm "Suc_plus1"}]
   102                         addsimps @{thms add_ac}
   101                         addsimps @{thms add_ac}