src/HOL/Tools/Qelim/presburger.ML
changeset 30224 79136ce06bdb
parent 30042 31039ee583fa
child 30242 aea5d7fa7ef5
equal deleted inserted replaced
30207:c56d27155041 30224:79136ce06bdb
   120             @{thm "all_nat"}, @{thm "ex_nat"}, @{thm "number_of1"}, 
   120             @{thm "all_nat"}, @{thm "ex_nat"}, @{thm "number_of1"}, 
   121             @{thm "number_of2"}, @{thm "int_0"}, @{thm "int_1"}, @{thm "Suc_plus1"}]
   121             @{thm "number_of2"}, @{thm "int_0"}, @{thm "int_1"}, @{thm "Suc_plus1"}]
   122   addcongs [@{thm "conj_le_cong"}, @{thm "imp_le_cong"}]
   122   addcongs [@{thm "conj_le_cong"}, @{thm "imp_le_cong"}]
   123 val div_mod_ss = HOL_basic_ss addsimps simp_thms 
   123 val div_mod_ss = HOL_basic_ss addsimps simp_thms 
   124   @ map (symmetric o mk_meta_eq) 
   124   @ map (symmetric o mk_meta_eq) 
   125     [@{thm "dvd_eq_mod_eq_0"}, @{thm "mod_add1_eq"}, 
   125     [@{thm "dvd_eq_mod_eq_0"},
   126      @{thm "mod_add_left_eq"}, @{thm "mod_add_right_eq"}, 
   126      @{thm "mod_add_left_eq"}, @{thm "mod_add_right_eq"}, 
   127      @{thm "mod_add_eq"}, @{thm "div_add1_eq"}, @{thm "zdiv_zadd1_eq"}]
   127      @{thm "mod_add_eq"}, @{thm "div_add1_eq"}, @{thm "zdiv_zadd1_eq"}]
   128   @ [@{thm "mod_self"}, @{thm "zmod_self"}, @{thm "mod_by_0"}, 
   128   @ [@{thm "mod_self"}, @{thm "zmod_self"}, @{thm "mod_by_0"}, 
   129      @{thm "div_by_0"}, @{thm "DIVISION_BY_ZERO"} RS conjunct1, 
   129      @{thm "div_by_0"}, @{thm "DIVISION_BY_ZERO"} RS conjunct1, 
   130      @{thm "DIVISION_BY_ZERO"} RS conjunct2, @{thm "zdiv_zero"}, @{thm "zmod_zero"}, 
   130      @{thm "DIVISION_BY_ZERO"} RS conjunct2, @{thm "zdiv_zero"}, @{thm "zmod_zero"},