src/HOL/Ord.ML
changeset 5316 7a8975451a89
parent 5143 b94cd208f073
child 5449 d853d1ac85a3
equal deleted inserted replaced
5315:c9ad6bbf3a34 5316:7a8975451a89
     6 The type class for ordered types
     6 The type class for ordered types
     7 *)
     7 *)
     8 
     8 
     9 (** mono **)
     9 (** mono **)
    10 
    10 
    11 val [prem] = goalw Ord.thy [mono_def]
    11 val [prem] = Goalw [mono_def]
    12     "[| !!A B. A <= B ==> f(A) <= f(B) |] ==> mono(f)";
    12     "[| !!A B. A <= B ==> f(A) <= f(B) |] ==> mono(f)";
    13 by (REPEAT (ares_tac [allI, impI, prem] 1));
    13 by (REPEAT (ares_tac [allI, impI, prem] 1));
    14 qed "monoI";
    14 qed "monoI";
    15 
    15 
    16 val [major,minor] = goalw Ord.thy [mono_def]
    16 Goalw [mono_def] "[| mono(f);  A <= B |] ==> f(A) <= f(B)";
    17     "[| mono(f);  A <= B |] ==> f(A) <= f(B)";
    17 by (Fast_tac 1);
    18 by (rtac (major RS spec RS spec RS mp) 1);
       
    19 by (rtac minor 1);
       
    20 qed "monoD";
    18 qed "monoD";
    21 
    19 
    22 
    20 
    23 section "Orders";
    21 section "Orders";
    24 
    22 
    44 
    42 
    45 val prems = Goalw [min_def] "(!!x. least <= x) ==> min least x = least";
    43 val prems = Goalw [min_def] "(!!x. least <= x) ==> min least x = least";
    46 by (simp_tac (simpset() addsimps prems) 1);
    44 by (simp_tac (simpset() addsimps prems) 1);
    47 qed "min_leastL";
    45 qed "min_leastL";
    48 
    46 
    49 val prems = goalw thy [min_def]
    47 val prems = Goalw [min_def]
    50  "(!!x::'a::order. least <= x) ==> min x least = least";
    48  "(!!x::'a::order. least <= x) ==> min x least = least";
    51 by (cut_facts_tac prems 1);
    49 by (cut_facts_tac prems 1);
    52 by (Asm_simp_tac 1);
    50 by (Asm_simp_tac 1);
    53 by (blast_tac (claset() addIs [order_antisym]) 1);
    51 by (blast_tac (claset() addIs [order_antisym]) 1);
    54 qed "min_leastR";
    52 qed "min_leastR";