src/HOL/MicroJava/DFA/LBVCorrect.thy
changeset 62390 842917225d56
parent 61361 8b5f00202e1a
child 68249 949d93804740
equal deleted inserted replaced
62380:29800666e526 62390:842917225d56
    40   assumes pc:  "pc+1 < length ins"
    40   assumes pc:  "pc+1 < length ins"
    41   shows "wtl (take (pc+1) ins) c 0 s0 \<sqsubseteq>\<^sub>r \<phi>!(pc+1)"
    41   shows "wtl (take (pc+1) ins) c 0 s0 \<sqsubseteq>\<^sub>r \<phi>!(pc+1)"
    42 proof -
    42 proof -
    43   from all pc
    43   from all pc
    44   have "wtc c (pc+1) (wtl (take (pc+1) ins) c 0 s0) \<noteq> T" by (rule wtl_all)
    44   have "wtc c (pc+1) (wtl (take (pc+1) ins) c 0 s0) \<noteq> T" by (rule wtl_all)
    45   with pc show ?thesis by (simp add: phi_def wtc split: split_if_asm)
    45   with pc show ?thesis by (simp add: phi_def wtc split: if_split_asm)
    46 qed
    46 qed
    47 
    47 
    48 
    48 
    49 lemma (in lbvs) wtl_stable:
    49 lemma (in lbvs) wtl_stable:
    50   assumes wtl: "wtl ins c 0 s0 \<noteq> \<top>" 
    50   assumes wtl: "wtl ins c 0 s0 \<noteq> \<top>" 
    66     by (simp add: phi_def)
    66     by (simp add: phi_def)
    67   from pc have c_None: "c!pc = \<bottom> \<Longrightarrow> \<phi>!pc = ?s1" ..
    67   from pc have c_None: "c!pc = \<bottom> \<Longrightarrow> \<phi>!pc = ?s1" ..
    68 
    68 
    69   from wt_s1 pc c_None c_Some
    69   from wt_s1 pc c_None c_Some
    70   have inst: "wtc c pc ?s1  = wti c pc (\<phi>!pc)"
    70   have inst: "wtc c pc ?s1  = wti c pc (\<phi>!pc)"
    71     by (simp add: wtc split: split_if_asm)
    71     by (simp add: wtc split: if_split_asm)
    72 
    72 
    73   from pres cert s0 wtl pc have "?s1 \<in> A" by (rule wtl_pres)
    73   from pres cert s0 wtl pc have "?s1 \<in> A" by (rule wtl_pres)
    74   with pc c_Some cert c_None
    74   with pc c_Some cert c_None
    75   have "\<phi>!pc \<in> A" by (cases "c!pc = \<bottom>") (auto dest: cert_okD1)
    75   have "\<phi>!pc \<in> A" by (cases "c!pc = \<bottom>") (auto dest: cert_okD1)
    76   with pc pres
    76   with pc pres
   173   case False
   173   case False
   174   with 0 have "phi!0 = c!0" ..
   174   with 0 have "phi!0 = c!0" ..
   175   moreover 
   175   moreover 
   176   from wtl have "wtl (take 1 ins) c 0 s0 \<noteq> \<top>"  by (rule wtl_take)
   176   from wtl have "wtl (take 1 ins) c 0 s0 \<noteq> \<top>"  by (rule wtl_take)
   177   with 0 False 
   177   with 0 False 
   178   have "s0 <=_r c!0" by (auto simp add: neq_Nil_conv wtc split: split_if_asm)
   178   have "s0 <=_r c!0" by (auto simp add: neq_Nil_conv wtc split: if_split_asm)
   179   ultimately
   179   ultimately
   180   show ?thesis by simp
   180   show ?thesis by simp
   181 qed
   181 qed
   182 
   182 
   183 
   183