src/HOL/MiniML/W.thy
changeset 1402 b72ccd1cff02
parent 1400 5d909faf0e04
child 1476 608483c2122a
equal deleted inserted replaced
1401:0c439768f45c 1402:b72ccd1cff02
    20 		          else Fail)"
    20 		          else Fail)"
    21   W_Abs	"W (Abs e) a n = ( (s,t,m) := W e ((TVar n)#a) (Suc n);
    21   W_Abs	"W (Abs e) a n = ( (s,t,m) := W e ((TVar n)#a) (Suc n);
    22 		           Ok(s, (s n) -> t, m) )"
    22 		           Ok(s, (s n) -> t, m) )"
    23   W_App	"W (App e1 e2) a n =
    23   W_App	"W (App e1 e2) a n =
    24  		 ( (s1,t1,m1) := W e1 a n;
    24  		 ( (s1,t1,m1) := W e1 a n;
    25 		   (s2,t2,m2) := W e2 ($ s1 a) m1;
    25 		   (s2,t2,m2) := W e2 ($s1 a) m1;
    26 		   u := mgu ($ s2 t1) (t2 -> (TVar m2));
    26 		   u := mgu ($s2 t1) (t2 -> (TVar m2));
    27 		   Ok( ($ u) o (($ s2) o s1), $ u (TVar m2), Suc m2) )"
    27 		   Ok( $u o $s2 o s1, $u (TVar m2), Suc m2) )"
    28 end
    28 end