src/ZF/Arith.ML
changeset 6163 be8234f37e48
parent 6153 bff90585cce5
child 7499 23e090051cb8
equal deleted inserted replaced
6162:484adda70b65 6163:be8234f37e48
   533 by (asm_full_simp_tac (simpset() addsimps [not_le_iff_lt,nat_into_Ord]) 1);
   533 by (asm_full_simp_tac (simpset() addsimps [not_le_iff_lt,nat_into_Ord]) 1);
   534 qed "add_le_elim1";
   534 qed "add_le_elim1";
   535 
   535 
   536 Goal "[| m<n; n: nat |] ==> EX k: nat. n = succ(m#+k)";
   536 Goal "[| m<n; n: nat |] ==> EX k: nat. n = succ(m#+k)";
   537 by (forward_tac [lt_nat_in_nat] 1 THEN assume_tac 1);
   537 by (forward_tac [lt_nat_in_nat] 1 THEN assume_tac 1);
   538 be rev_mp 1;
   538 by (etac rev_mp 1);
   539 by (induct_tac "n" 1);
   539 by (induct_tac "n" 1);
   540 by (ALLGOALS (simp_tac (simpset() addsimps [le_iff])));
   540 by (ALLGOALS (simp_tac (simpset() addsimps [le_iff])));
   541 by (blast_tac (claset() addSEs [leE] 
   541 by (blast_tac (claset() addSEs [leE] 
   542                         addSIs [add_0_right RS sym, add_succ_right RS sym]) 1);
   542                         addSIs [add_0_right RS sym, add_succ_right RS sym]) 1);
   543 qed_spec_mp "less_imp_Suc_add";
   543 qed_spec_mp "less_imp_Suc_add";