diff -r 6d718fda8215 -r f727b99faaf7 src/Pure/PIDE/session.scala
--- a/src/Pure/PIDE/session.scala	Fri Jul 17 21:37:33 2015 +0200
+++ b/src/Pure/PIDE/session.scala	Fri Jul 17 21:40:47 2015 +0200
@@ -202,9 +202,10 @@
   val phase_changed = new Session.Outlet[Session.Phase](dispatcher)
   val syslog_messages = new Session.Outlet[Prover.Output](dispatcher)
   val raw_output_messages = new Session.Outlet[Prover.Output](dispatcher)
-  val all_messages = new Session.Outlet[Prover.Message](dispatcher)  // potential bottle-neck
   val trace_events = new Session.Outlet[Simplifier_Trace.Event.type](dispatcher)
+  val debugger_events = new Session.Outlet[Debugger.Event.type](dispatcher)
 
+  val all_messages = new Session.Outlet[Prover.Message](dispatcher)  // potential bottle-neck!
 
 
   /** main protocol manager **/