# HG changeset patch # User haftmann # Date 1705175415 0 # Node ID 8205977e9e2c9b3bb5a7ccd41ddf26fd8a96883e # Parent c7cb1bf6efa0f308f3c99e47df3a6eb51c862219 simplified specification of type class diff -r c7cb1bf6efa0 -r 8205977e9e2c src/HOL/Bit_Operations.thy --- a/src/HOL/Bit_Operations.thy Sat Jan 13 19:50:12 2024 +0000 +++ b/src/HOL/Bit_Operations.thy Sat Jan 13 19:50:15 2024 +0000 @@ -15,8 +15,8 @@ \ (\a b. P a \ (of_bool b + 2 * a) div 2 = a \ P (of_bool b + 2 * a)) \ P a\ assumes bits_div_0 [simp]: \0 div a = 0\ + and bits_div_by_0 [simp]: \a div 0 = 0\ and bits_div_by_1 [simp]: \a div 1 = a\ - and bits_mod_div_trivial [simp]: \a mod b div b = 0\ and even_succ_div_2 [simp]: \even a \ (1 + a) div 2 = a div 2\ and even_mask_div_iff: \even ((2 ^ m - 1) div 2 ^ n) \ 2 ^ n = 0 \ m \ n\ and exp_div_exp_eq: \2 ^ m div 2 ^ n = of_bool (2 ^ m \ 0 \ m \ n) * 2 ^ (m - n)\ @@ -35,10 +35,6 @@ differently wrt. code generation. \ -lemma bits_div_by_0 [simp]: - \a div 0 = 0\ - by (metis add_cancel_right_right bits_mod_div_trivial mod_mult_div_eq mult_not_zero) - lemma bits_1_div_2 [simp]: \1 div 2 = 0\ using even_succ_div_2 [of 0] by simp @@ -83,6 +79,20 @@ \0 mod a = 0\ using div_mult_mod_eq [of 0 a] by simp +lemma mod_exp_div_exp_eq_0 [simp]: + \a mod 2 ^ n div 2 ^ n = 0\ +proof (induction n arbitrary: a) + case 0 + then show ?case + by simp +next + case (Suc n) + then have \a div 2 ^ 1 mod 2 ^ n div 2 ^ n = 0\ . + then show ?case + using div_exp_eq [of _ 1 n] div_exp_mod_exp_eq [of a 1 n] + by simp +qed + lemma bit_0: \bit a 0 \ odd a\ by (simp add: bit_iff_odd) diff -r c7cb1bf6efa0 -r 8205977e9e2c src/HOL/Code_Numeral.thy --- a/src/HOL/Code_Numeral.thy Sat Jan 13 19:50:12 2024 +0000 +++ b/src/HOL/Code_Numeral.thy Sat Jan 13 19:50:15 2024 +0000 @@ -349,7 +349,7 @@ instance by (standard; transfer) (fact bit_eq_rec bit_induct bit_iff_odd push_bit_eq_mult drop_bit_eq_div take_bit_eq_mod - bits_div_0 bits_div_by_1 bits_mod_div_trivial even_succ_div_2 + bits_div_0 bits_div_by_0 bits_div_by_1 even_succ_div_2 exp_div_exp_eq div_exp_eq mod_exp_eq mult_exp_mod_exp_eq div_exp_mod_exp_eq even_mask_div_iff even_mult_exp_div_exp_iff and_rec or_rec xor_rec mask_eq_exp_minus_1 @@ -1108,7 +1108,7 @@ instance by (standard; transfer) (fact bit_eq_rec bit_induct bit_iff_odd push_bit_eq_mult drop_bit_eq_div take_bit_eq_mod - bits_div_0 bits_div_by_1 bits_mod_div_trivial even_succ_div_2 + bits_div_0 bits_div_by_0 bits_div_by_1 even_succ_div_2 exp_div_exp_eq div_exp_eq mod_exp_eq mult_exp_mod_exp_eq div_exp_mod_exp_eq even_mask_div_iff even_mult_exp_div_exp_iff and_rec or_rec xor_rec mask_eq_exp_minus_1 set_bit_def unset_bit_0 unset_bit_Suc flip_bit_def)+ diff -r c7cb1bf6efa0 -r 8205977e9e2c src/HOL/Library/Word.thy --- a/src/HOL/Library/Word.thy Sat Jan 13 19:50:12 2024 +0000 +++ b/src/HOL/Library/Word.thy Sat Jan 13 19:50:15 2024 +0000 @@ -831,16 +831,12 @@ show \0 div a = 0\ for a :: \'a word\ by transfer simp + show \a div 0 = 0\ + for a :: \'a word\ + by transfer simp show \a div 1 = a\ for a :: \'a word\ by transfer simp - show \a mod b div b = 0\ - for a b :: \'a word\ - apply transfer - apply (simp add: take_bit_eq_mod) - apply (smt (verit, best) Euclidean_Rings.pos_mod_bound Euclidean_Rings.pos_mod_sign div_int_pos_iff - nonneg1_imp_zdiv_pos_iff zero_less_power zmod_le_nonneg_dividend) - done show \(1 + a) div 2 = a div 2\ if \even a\ for a :: \'a word\