# HG changeset patch
# User wenzelm
# Date 1325766470 -3600
# Node ID f7ee2e5a83dd27c61ba0572c524542a0a49bce34
# Parent  0d7172a7672cc8e22764e645c99bd878eee86548
tuned signature;

diff -r 0d7172a7672c -r f7ee2e5a83dd src/Pure/System/session.scala
--- a/src/Pure/System/session.scala	Thu Jan 05 13:24:29 2012 +0100
+++ b/src/Pure/System/session.scala	Thu Jan 05 13:27:50 2012 +0100
@@ -56,7 +56,7 @@
   val phase_changed = new Event_Bus[Session.Phase]
   val syslog_messages = new Event_Bus[Isabelle_Process.Result]
   val raw_output_messages = new Event_Bus[Isabelle_Process.Result]
-  val raw_messages = new Event_Bus[Isabelle_Process.Message]  // potential bottle-neck
+  val protocol_messages = new Event_Bus[Isabelle_Process.Message]  // potential bottle-neck
 
 
 
@@ -467,13 +467,13 @@
         case Messages(msgs) =>
           msgs foreach {
             case input: Isabelle_Process.Input =>
-              raw_messages.event(input)
+              protocol_messages.event(input)
 
             case result: Isabelle_Process.Result =>
               handle_result(result)
               if (result.is_syslog) syslog_messages.event(result)
               if (result.is_stdout || result.is_stderr) raw_output_messages.event(result)
-              raw_messages.event(result)
+              protocol_messages.event(result)
           }
 
         case change: Change_Node
diff -r 0d7172a7672c -r f7ee2e5a83dd src/Tools/jEdit/src/protocol_dockable.scala
--- a/src/Tools/jEdit/src/protocol_dockable.scala	Thu Jan 05 13:24:29 2012 +0100
+++ b/src/Tools/jEdit/src/protocol_dockable.scala	Thu Jan 05 13:27:50 2012 +0100
@@ -39,6 +39,6 @@
     }
   }
 
-  override def init() { Isabelle.session.raw_messages += main_actor }
-  override def exit() { Isabelle.session.raw_messages -= main_actor }
+  override def init() { Isabelle.session.protocol_messages += main_actor }
+  override def exit() { Isabelle.session.protocol_messages -= main_actor }
 }