author | wenzelm |
Thu, 26 Jul 2012 19:41:05 +0200 | |
changeset 48527 | 4ee8d70cd5a3 |
parent 48520 | 6d4ea2efa64b |
child 48580 | 9df76dd45900 |
permissions | -rw-r--r-- |
48367 | 1 |
(* :mode=isabelle-options: *) |
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48370 | 3 |
declare browser_info : bool = false |
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48458 | 5 |
declare document : string = "" |
48466
3b2fb20df17d
further imitation of ISABELLE_USEDIR_OPTIONS via options;
wenzelm
parents:
48463
diff
changeset
|
6 |
declare document_variants : string = "outline=/proof,/ML" |
48370 | 7 |
declare document_graph : bool = false |
48457 | 8 |
declare document_dump : string = "" |
48516
c5d0f19ef7cb
refined "document_dump_mode": "all", "tex+sty", "tex";
wenzelm
parents:
48513
diff
changeset
|
9 |
declare document_dump_mode : string = "all" |
48458 | 10 |
declare no_document : bool = false |
48367 | 11 |
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48466
3b2fb20df17d
further imitation of ISABELLE_USEDIR_OPTIONS via options;
wenzelm
parents:
48463
diff
changeset
|
12 |
declare threads : int = 0 |
48370 | 13 |
declare threads_trace : int = 0 |
48466
3b2fb20df17d
further imitation of ISABELLE_USEDIR_OPTIONS via options;
wenzelm
parents:
48463
diff
changeset
|
14 |
declare parallel_proofs : int = 2 |
48370 | 15 |
declare parallel_proofs_threshold : int = 100 |
48367 | 16 |
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48370 | 17 |
declare print_mode : string = "" |
48367 | 18 |
|
48466
3b2fb20df17d
further imitation of ISABELLE_USEDIR_OPTIONS via options;
wenzelm
parents:
48463
diff
changeset
|
19 |
declare proofs : int = 1 |
48370 | 20 |
declare quick_and_dirty : bool = false |
48367 | 21 |
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48370 | 22 |
declare condition : string = "" |
48367 | 23 |
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48486 | 24 |
declare show_question_marks : bool = true |
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declare names_long : bool = false |
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declare names_short : bool = false |
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declare names_unique : bool = true |
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48527 | 30 |
declare pretty_margin : int = 76 |
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48520 | 32 |
declare thy_output_display : bool = false |
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declare thy_output_quotes : bool = false |
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declare thy_output_indent : int = 0 |
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declare thy_output_source : bool = false |
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declare thy_output_break : bool = false |
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48492 | 38 |
declare timing : bool = false |
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