src/HOL/MicroJava/BV/BVSpecTypeSafe.thy
author kleing
Sun, 14 Jan 2001 18:19:18 +0100
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removed instructions Aconst_null+Bipush, introduced LitPush
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(*  Title:      HOL/MicroJava/BV/BVSpecTypeSafe.thy
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    ID:         $Id$
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    Author:     Cornelia Pusch
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    Copyright   1999 Technische Universitaet Muenchen
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Proof that the specification of the bytecode verifier only admits type safe
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programs.
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*)
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header "BV Type Safety Proof"
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theory BVSpecTypeSafe = Correct:
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lemmas defs1 = sup_state_conv correct_state_def correct_frame_def 
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               wt_instr_def step_def
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lemmas [simp del] = split_paired_All
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lemma wt_jvm_prog_impl_wt_instr_cor:
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  "[| wt_jvm_prog G phi; method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
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      G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
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  ==> wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc"
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apply (unfold correct_state_def Let_def correct_frame_def)
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apply simp
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apply (blast intro: wt_jvm_prog_impl_wt_instr)
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done
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lemmas [iff] = not_Err_eq
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lemma Load_correct:
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"[| wf_prog wt G;
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    method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
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    ins!pc = Load idx; 
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    wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
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    Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs); 
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    G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
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==> G,phi \<turnstile>JVM state'\<surd>"
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apply (clarsimp simp add: defs1 map_eq_Cons)
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apply (rule conjI)
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 apply (rule approx_loc_imp_approx_val_sup)
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 apply simp+
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apply (blast intro: approx_stk_imp_approx_stk_sup 
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                    approx_loc_imp_approx_loc_sup)
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done
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lemma Store_correct:
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"[| wf_prog wt G;
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  method (G,C) sig = Some (C,rT,maxs,maxl,ins);
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  ins!pc = Store idx;
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  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc;
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  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs);
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  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |]
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==> G,phi \<turnstile>JVM state'\<surd>"
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apply (clarsimp simp add: defs1 map_eq_Cons)
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apply (rule conjI)
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 apply (blast intro: approx_stk_imp_approx_stk_sup)
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apply (blast intro: approx_loc_imp_approx_loc_subst 
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                    approx_loc_imp_approx_loc_sup)
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done
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lemma LitPush_correct:
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"[| wf_prog wt G;
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    method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
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    ins!pc = LitPush v;
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    wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
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    Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs);
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    G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |]
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==> G,phi \<turnstile>JVM state'\<surd>"
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apply (clarsimp simp add: defs1 approx_val_def sup_PTS_eq map_eq_Cons)
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apply (blast dest: conf_litval intro: conf_widen approx_stk_imp_approx_stk_sup 
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                    approx_loc_imp_approx_loc_sup)
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done
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lemma NT_subtype_conv:
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  "G \<turnstile> NT \<preceq> T = (T=NT \<or> (\<exists>C. T = Class C))"
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proof -
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  have "!!T T'. G \<turnstile> T' \<preceq> T ==> T' = NT --> (T=NT | (\<exists>C. T = Class C))"
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    apply (erule widen.induct)
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    apply auto
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    apply (case_tac R)
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    apply auto
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    done
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  note l = this
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  show ?thesis 
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    by (force intro: null dest: l)
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qed
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lemma Cast_conf2:
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  "[| wf_prog ok G; G,h\<turnstile>v::\<preceq>RefT rt; cast_ok G C h v; 
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      G\<turnstile>Class C\<preceq>T; is_class G C|] 
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  ==> G,h\<turnstile>v::\<preceq>T"
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apply (unfold cast_ok_def)
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apply (frule widen_Class)
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apply (elim exE disjE)
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 apply (simp add: null)
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apply (clarsimp simp add: conf_def obj_ty_def)
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apply (cases v)
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apply (auto intro: rtrancl_trans)
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done
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lemma Checkcast_correct:
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"[| wf_prog wt G;
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    method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
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    ins!pc = Checkcast D; 
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    wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
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    Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
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    G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
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==> G,phi \<turnstile>JVM state'\<surd>"
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apply (clarsimp simp add: defs1 map_eq_Cons raise_xcpt_def approx_val_def)
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apply (blast intro: approx_stk_imp_approx_stk_sup 
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                    approx_loc_imp_approx_loc_sup Cast_conf2)
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done
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lemma Getfield_correct:
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"[| wf_prog wt G;
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  method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
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  ins!pc = Getfield F D; 
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  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
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  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
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  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
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==> G,phi \<turnstile>JVM state'\<surd>"
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apply (clarsimp simp add: defs1 raise_xcpt_def map_eq_Cons approx_val_def
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                split: option.split)
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apply (frule conf_widen)
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apply assumption+
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apply (drule conf_RefTD)
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apply (clarsimp simp add: defs1 approx_val_def)
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apply (rule conjI)
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 apply (drule widen_cfs_fields)
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 apply assumption+
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 apply (force intro: conf_widen simp add: hconf_def oconf_def lconf_def)
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apply (blast intro: approx_stk_imp_approx_stk_sup 
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                    approx_loc_imp_approx_loc_sup)
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done
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lemma Putfield_correct:
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"[| wf_prog wt G;
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  method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
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  ins!pc = Putfield F D; 
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  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
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  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
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  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
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==> G,phi \<turnstile>JVM state'\<surd>"
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apply (clarsimp simp add: defs1 raise_xcpt_def split: option.split List.split)
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apply (clarsimp simp add: approx_val_def)
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apply (frule conf_widen)
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prefer 2
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apply assumption
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apply assumption
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apply (drule conf_RefTD)
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apply clarsimp
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apply (blast 
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   159
       intro: 
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         sup_heap_update_value approx_stk_imp_approx_stk_sup_heap
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         approx_stk_imp_approx_stk_sup approx_loc_imp_approx_loc_sup_heap 
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         approx_loc_imp_approx_loc_sup hconf_imp_hconf_field_update
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         correct_frames_imp_correct_frames_field_update conf_widen 
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       dest: 
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         widen_cfs_fields)
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done
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   167
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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lemma collapse_paired_All:
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  "(\<forall>x y. P(x,y)) = (\<forall>z. P z)"
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  by fast
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lemma New_correct:
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   173
"[| wf_prog wt G;
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  method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
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  ins!pc = New cl_idx; 
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  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
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  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
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  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
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==> G,phi \<turnstile>JVM state'\<surd>"
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apply (clarsimp simp add: NT_subtype_conv approx_val_def conf_def defs1
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oheimb
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		   fun_upd_apply map_eq_Cons raise_xcpt_def init_vars_def 
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       split: option.split)
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apply (force dest!: iffD1 [OF collapse_paired_All]
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   184
       intro: sup_heap_newref approx_stk_imp_approx_stk_sup_heap 
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   185
              approx_stk_imp_approx_stk_sup 
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   186
              approx_loc_imp_approx_loc_sup_heap 
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   187
              approx_loc_imp_approx_loc_sup
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   188
              hconf_imp_hconf_newref correct_frames_imp_correct_frames_newref
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   189
              correct_init_obj 
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       simp add: NT_subtype_conv approx_val_def conf_def defs1
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   191
         fun_upd_apply map_eq_Cons raise_xcpt_def init_vars_def 
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       split: option.split)
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done
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   194
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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   195
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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(****** Method Invocation ******)
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   197
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lemmas [simp del] = split_paired_Ex
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   199
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lemma Invoke_correct: 
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   201
"[| wt_jvm_prog G phi; 
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  method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
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   203
  ins ! pc = Invoke C' mn pTs; 
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   204
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
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   205
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
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   206
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
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   207
==> G,phi \<turnstile>JVM state'\<surd>" 
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   208
proof -
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   209
  assume wtprog: "wt_jvm_prog G phi"
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   210
  assume method: "method (G,C) sig = Some (C,rT,maxs,maxl,ins)"
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   211
  assume ins:    "ins ! pc = Invoke C' mn pTs"
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   212
  assume wti:    "wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc"
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   213
  assume state': "Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs)"
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   214
  assume approx: "G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd>"
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   215
  
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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   216
  from wtprog 
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   217
  obtain wfmb where
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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   218
    wfprog: "wf_prog wfmb G" 
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   219
    by (simp add: wt_jvm_prog_def)
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diff changeset
   220
      
9757
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   221
  from ins method approx
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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   222
  obtain s where
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   223
    heap_ok: "G\<turnstile>h hp\<surd>" and
9757
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   224
    phi_pc:  "phi C sig!pc = Some s" and
10626
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   225
    is_class_C: "is_class G C" and
9757
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   226
    frame:   "correct_frame G hp s maxl ins (stk, loc, C, sig, pc)" and
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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   227
    frames:  "correct_frames G hp phi rT sig frs"
10626
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diff changeset
   228
    by (clarsimp simp add: correct_state_def iff del: not_None_eq)
9757
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   229
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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   230
  from ins wti phi_pc
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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   231
  obtain apTs X ST LT D' rT body where 
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   232
    s: "s = (rev apTs @ X # ST, LT)" and
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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   233
    l: "length apTs = length pTs" and
10626
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diff changeset
   234
    is_class: "is_class G C'" and
10812
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   235
    X: "G\<turnstile> X \<preceq> Class C'" and
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
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diff changeset
   236
    w: "\<forall>x\<in>set (zip apTs pTs). x \<in> widen G" and
9757
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   237
    mC': "method (G, C') (mn, pTs) = Some (D', rT, body)" and
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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   238
    pc:  "Suc pc < length ins" and
10812
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diff changeset
   239
    step: "G \<turnstile> step (Invoke C' mn pTs) G (Some s) <=' phi C sig!Suc pc"
10626
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diff changeset
   240
    by (simp add: wt_instr_def del: not_None_eq) (elim exE conjE, rule that)
9757
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diff changeset
   241
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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   242
  from step
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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   243
  obtain ST' LT' where
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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   244
    s': "phi C sig ! Suc pc = Some (ST', LT')"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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diff changeset
   245
    by (simp add: step_def split_paired_Ex) (elim, rule that)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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diff changeset
   246
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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diff changeset
   247
  from X 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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   248
  obtain T where
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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   249
    X_Ref: "X = RefT T"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
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diff changeset
   250
    by - (drule widen_RefT2, erule exE, rule that)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
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diff changeset
   251
  
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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diff changeset
   252
  from s ins frame 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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diff changeset
   253
  obtain 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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diff changeset
   254
    a_stk: "approx_stk G hp stk (rev apTs @ X # ST)" and
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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diff changeset
   255
    a_loc: "approx_loc G hp loc LT" and
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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diff changeset
   256
    suc_l: "length loc = Suc (length (snd sig) + maxl)"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
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diff changeset
   257
    by (simp add: correct_frame_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
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diff changeset
   258
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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diff changeset
   259
  from a_stk
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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diff changeset
   260
  obtain opTs stk' oX where
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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diff changeset
   261
    opTs:   "approx_stk G hp opTs (rev apTs)" and
10496
f2d304bdf3cc BCV integration (first step)
kleing
parents: 10387
diff changeset
   262
    oX:     "approx_val G hp oX (OK X)" and
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   263
    a_stk': "approx_stk G hp stk' ST" and
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   264
    stk':   "stk = opTs @ oX # stk'" and
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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diff changeset
   265
    l_o:    "length opTs = length apTs" 
10592
fc0b575a2cf7 BCV Integration
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diff changeset
   266
            "length stk' = length ST"  
9757
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kleing
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diff changeset
   267
    by - (drule approx_stk_append_lemma, simp, elim, simp)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   268
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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diff changeset
   269
  from oX 
10812
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kleing
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diff changeset
   270
  have "\<exists>T'. typeof (option_map obj_ty \<circ> hp) oX = Some T' \<and> G \<turnstile> T' \<preceq> X"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
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diff changeset
   271
    by (clarsimp simp add: approx_val_def conf_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
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diff changeset
   272
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
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diff changeset
   273
  with X_Ref
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
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diff changeset
   274
  obtain T' where
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
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diff changeset
   275
    oX_Ref: "typeof (option_map obj_ty \<circ> hp) oX = Some (RefT T')"
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
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diff changeset
   276
            "G \<turnstile> RefT T' \<preceq> X" 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
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diff changeset
   277
    apply (elim, simp)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   278
    apply (frule widen_RefT2)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   279
    by (elim, simp)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   280
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   281
  from stk' l_o l
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   282
  have oX_pos: "last (take (Suc (length pTs)) stk) = oX" 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   283
    by simp
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   284
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   285
  with state' method ins 
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   286
  have Null_ok: "oX = Null ==> ?thesis"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   287
    by (simp add: correct_state_def raise_xcpt_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   288
  
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   289
  { fix ref
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   290
    assume oX_Addr: "oX = Addr ref"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   291
    
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   292
    with oX_Ref
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   293
    obtain obj where
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   294
      loc: "hp ref = Some obj" "obj_ty obj = RefT T'"
10387
9dac2cad5500 adapted "obtain" proofs;
wenzelm
parents: 10056
diff changeset
   295
      by auto
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   296
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   297
    then 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   298
    obtain D where
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   299
      obj_ty: "obj_ty obj = Class D"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   300
      by (auto simp add: obj_ty_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   301
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   302
    with X_Ref oX_Ref loc
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   303
    obtain D: "G \<turnstile> Class D \<preceq> X"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   304
      by simp
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   305
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   306
    with X_Ref
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   307
    obtain X' where 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   308
      X': "X = Class X'"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   309
      by - (drule widen_Class, elim, rule that)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   310
      
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   311
    with X
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   312
    have X'_subcls: "G \<turnstile> X' \<preceq>C C'" 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   313
      by simp
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   314
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   315
    with mC' wfprog
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   316
    obtain D0 rT0 maxs0 maxl0 ins0 where
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   317
      mX: "method (G, X') (mn, pTs) = Some (D0, rT0, maxs0, maxl0, ins0)" "G\<turnstile>rT0\<preceq>rT"
10387
9dac2cad5500 adapted "obtain" proofs;
wenzelm
parents: 10056
diff changeset
   318
      by (auto dest: subtype_widen_methd intro: that)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   319
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   320
    from X' D
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   321
    have D_subcls: "G \<turnstile> D \<preceq>C X'" 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   322
      by simp
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   323
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   324
    with wfprog mX
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   325
    obtain D'' rT' mxs' mxl' ins' where
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   326
      mD: "method (G, D) (mn, pTs) = Some (D'', rT', mxs', mxl', ins')" 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   327
          "G \<turnstile> rT' \<preceq> rT0"
10387
9dac2cad5500 adapted "obtain" proofs;
wenzelm
parents: 10056
diff changeset
   328
      by (auto dest: subtype_widen_methd intro: that)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   329
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   330
    from mX mD
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   331
    have rT': "G \<turnstile> rT' \<preceq> rT"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   332
      by - (rule widen_trans)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   333
    
10612
779af7c58743 improved superclass entry for classes and definition status of is_class, class
oheimb
parents: 10592
diff changeset
   334
    from is_class X'_subcls D_subcls
779af7c58743 improved superclass entry for classes and definition status of is_class, class
oheimb
parents: 10592
diff changeset
   335
    have is_class_D: "is_class G D"
779af7c58743 improved superclass entry for classes and definition status of is_class, class
oheimb
parents: 10592
diff changeset
   336
    by (auto dest: subcls_is_class2)
779af7c58743 improved superclass entry for classes and definition status of is_class, class
oheimb
parents: 10592
diff changeset
   337
779af7c58743 improved superclass entry for classes and definition status of is_class, class
oheimb
parents: 10592
diff changeset
   338
    with mD wfprog
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   339
    obtain mD'': 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   340
      "method (G, D'') (mn, pTs) = Some (D'', rT', mxs', mxl', ins')"
10612
779af7c58743 improved superclass entry for classes and definition status of is_class, class
oheimb
parents: 10592
diff changeset
   341
      "is_class G D''"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   342
      by (auto dest: method_in_md)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   343
      
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   344
    from loc obj_ty
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   345
    have "fst (the (hp ref)) = D"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   346
      by (simp add: obj_ty_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   347
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   348
    with oX_Addr oX_pos state' method ins stk' l_o l loc obj_ty mD 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   349
    have state'_val:
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   350
      "state' =
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   351
       Norm (hp, ([], Addr ref # rev opTs @ replicate mxl' arbitrary, 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   352
                  D'', (mn, pTs), 0) # (stk', loc, C, sig, Suc pc) # frs)"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   353
      (is "state' = Norm (hp, ?f # ?f' # frs)")
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   354
      by (simp add: raise_xcpt_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   355
    
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   356
    from wtprog mD''
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   357
    have start: "wt_start G D'' pTs mxl' (phi D'' (mn, pTs)) \<and> ins' \<noteq> []"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   358
      by (auto dest: wt_jvm_prog_impl_wt_start)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   359
    
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   360
    then
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   361
    obtain LT0 where
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   362
      LT0: "phi D'' (mn, pTs) ! 0 = Some ([], LT0)"
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   363
      by (clarsimp simp add: wt_start_def sup_state_conv)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   364
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   365
    have c_f: "correct_frame G hp ([], LT0) mxl' ins' ?f"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   366
    proof -
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   367
      from start LT0
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   368
      have sup_loc: 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   369
        "G \<turnstile> (OK (Class D'') # map OK pTs @ replicate mxl' Err) <=l LT0"
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   370
        (is "G \<turnstile> ?LT <=l LT0")
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   371
        by (simp add: wt_start_def sup_state_conv)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   372
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   373
      have r: "approx_loc G hp (replicate mxl' arbitrary) (replicate mxl' Err)"
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   374
        by (simp add: approx_loc_def approx_val_Err 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   375
                      list_all2_def set_replicate_conv_if)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   376
10612
779af7c58743 improved superclass entry for classes and definition status of is_class, class
oheimb
parents: 10592
diff changeset
   377
      from wfprog mD is_class_D
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   378
      have "G \<turnstile> Class D \<preceq> Class D''"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   379
        by (auto dest: method_wf_mdecl)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   380
      with obj_ty loc
10496
f2d304bdf3cc BCV integration (first step)
kleing
parents: 10387
diff changeset
   381
      have a: "approx_val G hp (Addr ref) (OK (Class D''))"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   382
        by (simp add: approx_val_def conf_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   383
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   384
      from w l
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   385
      have "\<forall>x\<in>set (zip (rev apTs) (rev pTs)). x \<in> widen G"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   386
        by (auto simp add: zip_rev)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   387
      with wfprog l l_o opTs
10496
f2d304bdf3cc BCV integration (first step)
kleing
parents: 10387
diff changeset
   388
      have "approx_loc G hp opTs (map OK (rev pTs))"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   389
        by (auto intro: assConv_approx_stk_imp_approx_loc)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   390
      hence "approx_stk G hp opTs (rev pTs)"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   391
        by (simp add: approx_stk_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   392
      hence "approx_stk G hp (rev opTs) pTs"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   393
        by (simp add: approx_stk_rev)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   394
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   395
      with r a l_o l
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   396
      have "approx_loc G hp (Addr ref # rev opTs @ replicate mxl' arbitrary) ?LT"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   397
        (is "approx_loc G hp ?lt ?LT")
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   398
        by (auto simp add: approx_loc_append approx_stk_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   399
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   400
      from wfprog this sup_loc
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   401
      have "approx_loc G hp ?lt LT0"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   402
        by (rule approx_loc_imp_approx_loc_sup)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   403
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   404
      with start l_o l
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   405
      show ?thesis
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   406
        by (simp add: correct_frame_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   407
    qed
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   408
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   409
    have c_f': "correct_frame G hp (tl ST', LT') maxl ins ?f'"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   410
    proof -    
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   411
      from s s' mC' step l
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   412
      have "G \<turnstile> LT <=l LT'"
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   413
        by (simp add: step_def sup_state_conv)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   414
      with wfprog a_loc
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   415
      have a: "approx_loc G hp loc LT'"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   416
        by (rule approx_loc_imp_approx_loc_sup)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   417
      moreover
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   418
      from s s' mC' step l
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   419
      have  "G \<turnstile> map OK ST <=l map OK (tl ST')"
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   420
        by (auto simp add: step_def sup_state_conv map_eq_Cons)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   421
      with wfprog a_stk'
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   422
      have "approx_stk G hp stk' (tl ST')"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   423
        by (rule approx_stk_imp_approx_stk_sup)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   424
      ultimately
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   425
      show ?thesis
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   426
        by (simp add: correct_frame_def suc_l pc)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   427
    qed
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   428
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   429
    with state'_val heap_ok mD'' ins method phi_pc s X' l 
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   430
         frames s' LT0 c_f c_f' is_class_C
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   431
    have ?thesis
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   432
      by (simp add: correct_state_def) (intro exI conjI, force+)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   433
  }
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   434
  
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   435
  with Null_ok oX_Ref
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   436
  show "G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   437
    by - (cases oX, auto)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   438
qed
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   439
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   440
lemmas [simp del] = map_append
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   441
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   442
lemma Return_correct:
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   443
"[| wt_jvm_prog G phi; 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   444
  method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   445
  ins ! pc = Return; 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   446
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   447
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   448
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   449
==> G,phi \<turnstile>JVM state'\<surd>"
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   450
apply (clarsimp simp add: neq_Nil_conv defs1 split: split_if_asm iff del: not_None_eq)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   451
apply (frule wt_jvm_prog_impl_wt_instr)
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   452
apply (assumption, assumption, erule Suc_lessD)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   453
apply (unfold wt_jvm_prog_def)
9819
wenzelm
parents: 9757
diff changeset
   454
apply (fastsimp
wenzelm
parents: 9757
diff changeset
   455
  dest: subcls_widen_methd
wenzelm
parents: 9757
diff changeset
   456
  elim: widen_trans [COMP swap_prems_rl]
wenzelm
parents: 9757
diff changeset
   457
  intro: conf_widen
wenzelm
parents: 9757
diff changeset
   458
  simp: approx_val_def append_eq_conv_conj map_eq_Cons defs1)
wenzelm
parents: 9757
diff changeset
   459
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   460
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   461
lemmas [simp] = map_append
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   462
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   463
lemma Goto_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   464
"[| wf_prog wt G; 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   465
  method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   466
  ins ! pc = Goto branch; 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   467
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   468
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   469
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   470
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   471
apply (clarsimp simp add: defs1)
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   472
apply (fast intro: approx_loc_imp_approx_loc_sup 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   473
                   approx_stk_imp_approx_stk_sup)
9819
wenzelm
parents: 9757
diff changeset
   474
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   475
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   476
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   477
lemma Ifcmpeq_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   478
"[| wf_prog wt G; 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   479
  method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   480
  ins ! pc = Ifcmpeq branch; 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   481
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   482
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   483
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   484
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   485
apply (clarsimp simp add: defs1)
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   486
apply (fast intro: approx_loc_imp_approx_loc_sup 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   487
                   approx_stk_imp_approx_stk_sup)
9819
wenzelm
parents: 9757
diff changeset
   488
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   489
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   490
lemma Pop_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   491
"[| wf_prog wt G; 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   492
  method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   493
  ins ! pc = Pop;
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   494
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   495
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   496
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   497
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   498
apply (clarsimp simp add: defs1)
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   499
apply (fast intro: approx_loc_imp_approx_loc_sup 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   500
                   approx_stk_imp_approx_stk_sup)
9819
wenzelm
parents: 9757
diff changeset
   501
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   502
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   503
lemma Dup_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   504
"[| wf_prog wt G; 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   505
  method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   506
  ins ! pc = Dup;
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   507
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   508
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   509
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   510
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   511
apply (clarsimp simp add: defs1 map_eq_Cons)
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   512
apply (force intro: approx_stk_imp_approx_stk_sup 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   513
                    approx_val_imp_approx_val_sup 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   514
                    approx_loc_imp_approx_loc_sup
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   515
             simp add: defs1 map_eq_Cons)
9819
wenzelm
parents: 9757
diff changeset
   516
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   517
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   518
lemma Dup_x1_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   519
"[| wf_prog wt G; 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   520
  method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   521
  ins ! pc = Dup_x1;
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   522
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   523
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   524
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   525
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   526
apply (clarsimp simp add: defs1 map_eq_Cons)
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   527
apply (force intro: approx_stk_imp_approx_stk_sup 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   528
                    approx_val_imp_approx_val_sup 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   529
                    approx_loc_imp_approx_loc_sup
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   530
             simp add: defs1 map_eq_Cons)
9819
wenzelm
parents: 9757
diff changeset
   531
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   532
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   533
lemma Dup_x2_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   534
"[| wf_prog wt G; 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   535
  method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   536
  ins ! pc = Dup_x2;
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   537
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   538
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   539
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   540
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   541
apply (clarsimp simp add: defs1 map_eq_Cons)
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   542
apply (force intro: approx_stk_imp_approx_stk_sup 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   543
                    approx_val_imp_approx_val_sup 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   544
                    approx_loc_imp_approx_loc_sup
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   545
             simp add: defs1 map_eq_Cons)
9819
wenzelm
parents: 9757
diff changeset
   546
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   547
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   548
lemma Swap_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   549
"[| wf_prog wt G; 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   550
  method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   551
  ins ! pc = Swap;
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   552
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   553
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   554
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   555
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   556
apply (clarsimp simp add: defs1 map_eq_Cons)
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   557
apply (force intro: approx_stk_imp_approx_stk_sup 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   558
                    approx_val_imp_approx_val_sup 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   559
                    approx_loc_imp_approx_loc_sup
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   560
             simp add: defs1 map_eq_Cons)
9819
wenzelm
parents: 9757
diff changeset
   561
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   562
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   563
lemma IAdd_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   564
"[| wf_prog wt G; 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   565
  method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   566
  ins ! pc = IAdd; 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   567
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   568
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   569
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   570
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   571
apply (clarsimp simp add: defs1 map_eq_Cons approx_val_def conf_def)
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   572
apply (blast intro: approx_stk_imp_approx_stk_sup 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   573
                    approx_val_imp_approx_val_sup 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   574
                    approx_loc_imp_approx_loc_sup)
9819
wenzelm
parents: 9757
diff changeset
   575
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   576
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   577
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   578
(** instr correct **)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   579
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   580
lemma instr_correct:
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   581
"[| wt_jvm_prog G phi;
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   582
  method (G,C) sig = Some (C,rT,maxs,maxl,ins); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   583
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs); 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   584
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   585
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   586
apply (frule wt_jvm_prog_impl_wt_instr_cor)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   587
apply assumption+
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   588
apply (cases "ins!pc")
10897
697fab84709e removed instructions Aconst_null+Bipush, introduced LitPush
kleing
parents: 10812
diff changeset
   589
prefer 8
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   590
apply (rule Invoke_correct, assumption+)
10897
697fab84709e removed instructions Aconst_null+Bipush, introduced LitPush
kleing
parents: 10812
diff changeset
   591
prefer 8
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   592
apply (rule Return_correct, assumption+)
10612
779af7c58743 improved superclass entry for classes and definition status of is_class, class
oheimb
parents: 10592
diff changeset
   593
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   594
apply (unfold wt_jvm_prog_def)
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   595
apply (rule Load_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   596
apply (rule Store_correct, assumption+)
10897
697fab84709e removed instructions Aconst_null+Bipush, introduced LitPush
kleing
parents: 10812
diff changeset
   597
apply (rule LitPush_correct, assumption+)
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   598
apply (rule New_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   599
apply (rule Getfield_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   600
apply (rule Putfield_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   601
apply (rule Checkcast_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   602
apply (rule Pop_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   603
apply (rule Dup_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   604
apply (rule Dup_x1_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   605
apply (rule Dup_x2_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   606
apply (rule Swap_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   607
apply (rule IAdd_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   608
apply (rule Goto_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   609
apply (rule Ifcmpeq_correct, assumption+)
9819
wenzelm
parents: 9757
diff changeset
   610
done
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   611
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   612
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   613
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   614
(** Main **)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   615
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   616
lemma correct_state_impl_Some_method:
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   617
  "G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   618
  ==> \<exists>meth. method (G,C) sig = Some(C,meth)"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   619
by (auto simp add: correct_state_def Let_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   620
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   621
9941
fe05af7ec816 renamed atts: rulify to rule_format, elimify to elim_format;
wenzelm
parents: 9906
diff changeset
   622
lemma BV_correct_1 [rule_format]:
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   623
"!!state. [| wt_jvm_prog G phi; G,phi \<turnstile>JVM state\<surd>|] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   624
 ==> exec (G,state) = Some state' --> G,phi \<turnstile>JVM state'\<surd>"
9819
wenzelm
parents: 9757
diff changeset
   625
apply (simp only: split_tupled_all)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   626
apply (rename_tac xp hp frs)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   627
apply (case_tac xp)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   628
 apply (case_tac frs)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   629
  apply simp
9819
wenzelm
parents: 9757
diff changeset
   630
 apply (simp only: split_tupled_all)
wenzelm
parents: 9757
diff changeset
   631
 apply hypsubst
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   632
 apply (frule correct_state_impl_Some_method)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   633
 apply (force intro: instr_correct)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   634
apply (case_tac frs)
9819
wenzelm
parents: 9757
diff changeset
   635
apply simp_all
wenzelm
parents: 9757
diff changeset
   636
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   637
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   638
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   639
lemma L0:
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   640
  "[| xp=None; frs\<noteq>[] |] ==> (\<exists>state'. exec (G,xp,hp,frs) = Some state')"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   641
by (clarsimp simp add: neq_Nil_conv simp del: split_paired_Ex)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   642
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   643
lemma L1:
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   644
  "[|wt_jvm_prog G phi; G,phi \<turnstile>JVM (xp,hp,frs)\<surd>; xp=None; frs\<noteq>[]|] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   645
  ==> \<exists>state'. exec(G,xp,hp,frs) = Some state' \<and> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   646
apply (drule L0)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   647
apply assumption
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   648
apply (fast intro: BV_correct_1)
9819
wenzelm
parents: 9757
diff changeset
   649
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   650
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   651
9941
fe05af7ec816 renamed atts: rulify to rule_format, elimify to elim_format;
wenzelm
parents: 9906
diff changeset
   652
theorem BV_correct [rule_format]:
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   653
"[| wt_jvm_prog G phi; G \<turnstile> s -jvm-> t |] ==> G,phi \<turnstile>JVM s\<surd> --> G,phi \<turnstile>JVM t\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   654
apply (unfold exec_all_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   655
apply (erule rtrancl_induct)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   656
 apply simp
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   657
apply (auto intro: BV_correct_1)
9819
wenzelm
parents: 9757
diff changeset
   658
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   659
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   660
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   661
theorem BV_correct_initial:
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   662
"[| wt_jvm_prog G phi; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   663
    G \<turnstile> s0 -jvm-> (None,hp,(stk,loc,C,sig,pc)#frs); G,phi \<turnstile>JVM s0 \<surd>|] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   664
==> approx_stk G hp stk (fst (the (((phi  C)  sig) ! pc))) \<and> 
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   665
    approx_loc G hp loc (snd (the (((phi  C)  sig) ! pc)))"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   666
apply (drule BV_correct)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   667
apply assumption+
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   668
apply (simp add: correct_state_def correct_frame_def split_def 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   669
            split: option.splits)
9819
wenzelm
parents: 9757
diff changeset
   670
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   671
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   672
end