author | wenzelm |
Fri, 05 Oct 2001 21:49:59 +0200 | |
changeset 11699 | c7df55158574 |
parent 10835 | f4745d77e620 |
child 12218 | 6597093b77e7 |
permissions | -rw-r--r-- |
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(* Title: HOLCF/IOA/meta_theory/Deadlock.ML |
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ID: $Id$ |
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Author: Olaf Mueller |
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Copyright 1997 TU Muenchen |
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Deadlock freedom of I/O Automata |
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*) |
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(******************************************************************************** |
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input actions may always be added to a schedule |
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**********************************************************************************) |
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Goal "[| Filter (%x. x:act A)$sch : schedules A; a:inp A; input_enabled A; Finite sch|] \ |
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\ ==> Filter (%x. x:act A)$sch @@ a>>nil : schedules A"; |
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by (asm_full_simp_tac (simpset() addsimps [schedules_def,has_schedule_def]) 1); |
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by (safe_tac set_cs); |
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by (ftac inp_is_act 1); |
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by (asm_full_simp_tac (simpset() addsimps [executions_def]) 1); |
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by (pair_tac "ex" 1); |
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ren "s ex" 1; |
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by (subgoal_tac "Finite ex" 1); |
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by (asm_full_simp_tac (simpset() addsimps [filter_act_def]) 2); |
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by (rtac (Map2Finite RS iffD1) 2); |
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by (res_inst_tac [("t","Map fst$ex")] subst 2); |
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by (assume_tac 2); |
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by (etac FiniteFilter 2); |
|
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(* subgoal 1 *) |
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by (ftac exists_laststate 1); |
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by (etac allE 1); |
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by (etac exE 1); |
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(* using input-enabledness *) |
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by (asm_full_simp_tac (simpset() addsimps [input_enabled_def]) 1); |
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by (REPEAT (etac conjE 1)); |
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by (eres_inst_tac [("x","a")] allE 1); |
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by (Asm_full_simp_tac 1); |
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by (eres_inst_tac [("x","u")] allE 1); |
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by (etac exE 1); |
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(* instantiate execution *) |
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by (res_inst_tac [("x","(s,ex @@ (a,s2)>>nil)")] exI 1); |
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by (asm_full_simp_tac (simpset() addsimps [filter_act_def,MapConc]) 1); |
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by (eres_inst_tac [("t","u")] lemma_2_1 1); |
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by (Asm_full_simp_tac 1); |
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by (rtac sym 1); |
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by (assume_tac 1); |
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qed"scheds_input_enabled"; |
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(******************************************************************************** |
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Deadlock freedom: component B cannot block an out or int action |
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of component A in every schedule. |
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Needs compositionality on schedule level, input-enabledness, compatibility |
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and distributivity of is_exec_frag over @@ |
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**********************************************************************************) |
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Delsplits [split_if]; |
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Goal "[| a : local A; Finite sch; sch : schedules (A||B); \ |
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\ Filter (%x. x:act A)$(sch @@ a>>nil) : schedules A; compatible A B; input_enabled B |] \ |
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\ ==> (sch @@ a>>nil) : schedules (A||B)"; |
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by (asm_full_simp_tac (simpset() addsimps [compositionality_sch,locals_def]) 1); |
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by (rtac conjI 1); |
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(* a : act (A||B) *) |
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by (asm_full_simp_tac (simpset() addsimps [actions_of_par]) 2); |
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by (blast_tac (claset() addDs [int_is_act,out_is_act]) 2); |
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(* Filter B (sch@@[a]) : schedules B *) |
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by (case_tac "a:int A" 1); |
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by (dtac intA_is_not_actB 1); |
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by (assume_tac 1); (* --> a~:act B *) |
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by (Asm_full_simp_tac 1); |
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(* case a~:int A , i.e. a:out A *) |
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by (case_tac "a~:act B" 1); |
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by (Asm_full_simp_tac 1); |
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(* case a:act B *) |
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by (Asm_full_simp_tac 1); |
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by (subgoal_tac "a:out A" 1); |
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by (Blast_tac 2); |
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by (dtac outAactB_is_inpB 1); |
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by (assume_tac 1); |
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by (assume_tac 1); |
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by (rtac scheds_input_enabled 1); |
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by (Asm_full_simp_tac 1); |
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by (REPEAT (atac 1)); |
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qed"IOA_deadlock_free"; |
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Addsplits [split_if]; |
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