src/HOL/Tools/inductive_realizer.ML
changeset 21858 05f57309170c
parent 21646 c07b5b0e8492
child 22271 51a80e238b29
equal deleted inserted replaced
21857:f9d085c2625c 21858:05f57309170c
   294     val ar = length vs + length iTs;
   294     val ar = length vs + length iTs;
   295     val (_ $ (_ $ _ $ S)) = Logic.strip_imp_concl (prop_of (hd intrs));
   295     val (_ $ (_ $ _ $ S)) = Logic.strip_imp_concl (prop_of (hd intrs));
   296     val (_, params) = strip_comb S;
   296     val (_, params) = strip_comb S;
   297     val params' = map dest_Var params;
   297     val params' = map dest_Var params;
   298     val rss = [] |> fold add_rule intrs;
   298     val rss = [] |> fold add_rule intrs;
   299     val (prfx, _) = split_last (NameSpace.unpack (fst (hd rss)));
   299     val (prfx, _) = split_last (NameSpace.explode (fst (hd rss)));
   300     val tnames = map (fn s => space_implode "_" (s ^ "T" :: vs)) rsets;
   300     val tnames = map (fn s => space_implode "_" (s ^ "T" :: vs)) rsets;
   301 
   301 
   302     val thy1 = thy |>
   302     val thy1 = thy |>
   303       Theory.root_path |>
   303       Theory.root_path |>
   304       Theory.add_path (NameSpace.pack prfx);
   304       Theory.add_path (NameSpace.implode prfx);
   305     val (ty_eqs, rlz_eqs) = split_list
   305     val (ty_eqs, rlz_eqs) = split_list
   306       (map (fn (s, rs) => mk_realizes_eqn (not (s mem rsets)) vs rs) rss);
   306       (map (fn (s, rs) => mk_realizes_eqn (not (s mem rsets)) vs rs) rss);
   307 
   307 
   308     val thy1' = thy1 |>
   308     val thy1' = thy1 |>
   309       Theory.copy |>
   309       Theory.copy |>