src/HOLCF/IOA/meta_theory/SimCorrectness.ML
changeset 5132 24f992a25adc
parent 5068 fb28eaa07e01
child 6161 bc2a76ce1ea3
equal deleted inserted replaced
5131:dd4ac220b8b4 5132:24f992a25adc
    25 \                             in \
    25 \                             in \
    26 \                                (@cex. move A cex s a T')  \
    26 \                                (@cex. move A cex s a T')  \
    27 \                              @@ ((corresp_ex_simC A R `xs) T'))   \
    27 \                              @@ ((corresp_ex_simC A R `xs) T'))   \
    28 \                        `x) ))";
    28 \                        `x) ))";
    29 by (rtac trans 1);
    29 by (rtac trans 1);
    30 br fix_eq2 1;
    30 by (rtac fix_eq2 1);
    31 br corresp_ex_simC_def 1;
    31 by (rtac corresp_ex_simC_def 1);
    32 br beta_cfun 1;
    32 by (rtac beta_cfun 1);
    33 by (simp_tac (simpset() addsimps [flift1_def]) 1);
    33 by (simp_tac (simpset() addsimps [flift1_def]) 1);
    34 qed"corresp_ex_simC_unfold";
    34 qed"corresp_ex_simC_unfold";
    35 
    35 
    36 Goal "(corresp_ex_simC A R`UU) s=UU";
    36 Goal "(corresp_ex_simC A R`UU) s=UU";
    37 by (stac corresp_ex_simC_unfold 1);
    37 by (stac corresp_ex_simC_unfold 1);
    46 Goal "(corresp_ex_simC A R`((a,t)>>xs)) s = \
    46 Goal "(corresp_ex_simC A R`((a,t)>>xs)) s = \
    47 \          (let T' = @t'. ? ex1. (t,t'):R & move A ex1 s a t' \
    47 \          (let T' = @t'. ? ex1. (t,t'):R & move A ex1 s a t' \
    48 \           in  \
    48 \           in  \
    49 \            (@cex. move A cex s a T')  \ 
    49 \            (@cex. move A cex s a T')  \ 
    50 \             @@ ((corresp_ex_simC A R`xs) T'))";
    50 \             @@ ((corresp_ex_simC A R`xs) T'))";
    51 br trans 1;
    51 by (rtac trans 1);
    52 by (stac corresp_ex_simC_unfold 1);
    52 by (stac corresp_ex_simC_unfold 1);
    53 by (asm_full_simp_tac (simpset() addsimps [Cons_def,flift1_def]) 1);
    53 by (asm_full_simp_tac (simpset() addsimps [Cons_def,flift1_def]) 1);
    54 by (Simp_tac 1);
    54 by (Simp_tac 1);
    55 qed"corresp_ex_simC_cons";
    55 qed"corresp_ex_simC_cons";
    56 
    56 
    82 by (eres_inst_tac [("x","s'")] allE 2);
    82 by (eres_inst_tac [("x","s'")] allE 2);
    83 by (eres_inst_tac [("x","t")] allE 2);
    83 by (eres_inst_tac [("x","t")] allE 2);
    84 by (eres_inst_tac [("x","a")] allE 2);
    84 by (eres_inst_tac [("x","a")] allE 2);
    85 by (Asm_full_simp_tac 2); 
    85 by (Asm_full_simp_tac 2); 
    86 (* Go on as usual *)
    86 (* Go on as usual *)
    87 be exE 1;
    87 by (etac exE 1);
    88 by (dres_inst_tac [("x","t'"),
    88 by (dres_inst_tac [("x","t'"),
    89          ("P","%t'. ? ex.(t,t'):R & move A ex s' a t'")] selectI 1);
    89          ("P","%t'. ? ex.(t,t'):R & move A ex s' a t'")] selectI 1);
    90 be exE 1;
    90 by (etac exE 1);
    91 be conjE 1;
    91 by (etac conjE 1);
    92 by (asm_full_simp_tac (simpset() addsimps [Let_def]) 1);
    92 by (asm_full_simp_tac (simpset() addsimps [Let_def]) 1);
    93 by (res_inst_tac [("x","ex")] selectI 1);
    93 by (res_inst_tac [("x","ex")] selectI 1);
    94 be conjE 1;
    94 by (etac conjE 1);
    95 ba 1;
    95 by (assume_tac 1);
    96 qed"move_is_move_sim";
    96 qed"move_is_move_sim";
    97 
    97 
    98 
    98 
    99 Addsimps [Let_def];
    99 Addsimps [Let_def];
   100 
   100 
   166 (* cons case *) 
   166 (* cons case *) 
   167 by (safe_tac set_cs); 
   167 by (safe_tac set_cs); 
   168 ren "ex a t s s'" 1;
   168 ren "ex a t s s'" 1;
   169 by (asm_full_simp_tac (simpset() addsimps [mk_traceConc]) 1);
   169 by (asm_full_simp_tac (simpset() addsimps [mk_traceConc]) 1);
   170 by (forward_tac [reachable.reachable_n] 1);
   170 by (forward_tac [reachable.reachable_n] 1);
   171 ba 1;
   171 by (assume_tac 1);
   172 by (eres_inst_tac [("x","t")] allE 1);
   172 by (eres_inst_tac [("x","t")] allE 1);
   173 by (eres_inst_tac [("x",
   173 by (eres_inst_tac [("x",
   174                     "@t'. ? ex1. (t,t'):R & move A ex1 s' a t'")] 
   174                     "@t'. ? ex1. (t,t'):R & move A ex1 s' a t'")] 
   175      allE 1);
   175      allE 1);
   176 by (Asm_full_simp_tac 1);
   176 by (Asm_full_simp_tac 1);
   200 by (res_inst_tac [("t",
   200 by (res_inst_tac [("t",
   201                    "@t'. ? ex1. (t,t'):R & move A ex1 s' a t'")]  
   201                    "@t'. ? ex1. (t,t'):R & move A ex1 s' a t'")]  
   202     lemma_2_1 1);
   202     lemma_2_1 1);
   203 
   203 
   204 (* Finite *)
   204 (* Finite *)
   205 be (rewrite_rule [Let_def] move_subprop2_sim) 1;
   205 by (etac (rewrite_rule [Let_def] move_subprop2_sim) 1);
   206 by (REPEAT (atac 1));
   206 by (REPEAT (atac 1));
   207 by (rtac conjI 1);
   207 by (rtac conjI 1);
   208 
   208 
   209 (* is_exec_frag *)
   209 (* is_exec_frag *)
   210 be  (rewrite_rule [Let_def] move_subprop1_sim) 1;
   210 by (etac (rewrite_rule [Let_def] move_subprop1_sim) 1);
   211 by (REPEAT (atac 1));
   211 by (REPEAT (atac 1));
   212 by (rtac conjI 1);
   212 by (rtac conjI 1);
   213 
   213 
   214 (* Induction hypothesis  *)
   214 (* Induction hypothesis  *)
   215 (* reachable_n looping, therefore apply it manually *)
   215 (* reachable_n looping, therefore apply it manually *)
   217 by (eres_inst_tac [("x",
   217 by (eres_inst_tac [("x",
   218                     "@t'. ? ex1. (t,t'):R & move A ex1 s' a t'")] 
   218                     "@t'. ? ex1. (t,t'):R & move A ex1 s' a t'")] 
   219      allE 1);
   219      allE 1);
   220 by (Asm_full_simp_tac 1);
   220 by (Asm_full_simp_tac 1);
   221 by (forward_tac [reachable.reachable_n] 1);
   221 by (forward_tac [reachable.reachable_n] 1);
   222 ba 1;
   222 by (assume_tac 1);
   223 by (asm_full_simp_tac (simpset() addsimps 
   223 by (asm_full_simp_tac (simpset() addsimps 
   224             [rewrite_rule [Let_def] move_subprop5_sim]) 1);
   224             [rewrite_rule [Let_def] move_subprop5_sim]) 1);
   225 (* laststate *)
   225 (* laststate *)
   226 be ((rewrite_rule [Let_def] move_subprop3_sim) RS sym) 1;
   226 by (etac ((rewrite_rule [Let_def] move_subprop3_sim) RS sym) 1);
   227 by (REPEAT (atac 1));
   227 by (REPEAT (atac 1));
   228 qed_spec_mp"correspsim_is_execution";
   228 qed_spec_mp"correspsim_is_execution";
   229 
   229 
   230 
   230 
   231 (* -------------------------------------------------------------------------------- *)
   231 (* -------------------------------------------------------------------------------- *)
   244 \ ==> let S' = @s'. (s,s'):R & s':starts_of A in \
   244 \ ==> let S' = @s'. (s,s'):R & s':starts_of A in \
   245 \     (s,S'):R & S':starts_of A";
   245 \     (s,S'):R & S':starts_of A";
   246   by (asm_full_simp_tac (simpset() addsimps [is_simulation_def,
   246   by (asm_full_simp_tac (simpset() addsimps [is_simulation_def,
   247          corresp_ex_sim_def, Int_non_empty,Image_def]) 1);
   247          corresp_ex_sim_def, Int_non_empty,Image_def]) 1);
   248   by (REPEAT (etac conjE 1));
   248   by (REPEAT (etac conjE 1));
   249   be ballE 1;
   249   by (etac ballE 1);
   250   by (Blast_tac 2);
   250   by (Blast_tac 2);
   251   be exE 1;
   251   by (etac exE 1);
   252   br selectI2 1;
   252   by (rtac selectI2 1);
   253   ba 1;
   253   by (assume_tac 1);
   254   by (Blast_tac 1);
   254   by (Blast_tac 1);
   255 qed"simulation_starts";
   255 qed"simulation_starts";
   256 
   256 
   257 bind_thm("sim_starts1",(rewrite_rule [Let_def] simulation_starts) RS conjunct1);
   257 bind_thm("sim_starts1",(rewrite_rule [Let_def] simulation_starts) RS conjunct1);
   258 bind_thm("sim_starts2",(rewrite_rule [Let_def] simulation_starts) RS conjunct2);
   258 bind_thm("sim_starts2",(rewrite_rule [Let_def] simulation_starts) RS conjunct2);
   288          corresp_ex_sim_def]) 1);
   288          corresp_ex_sim_def]) 1);
   289 
   289 
   290   (* is-execution-fragment *)
   290   (* is-execution-fragment *)
   291   by (asm_full_simp_tac (simpset() addsimps [corresp_ex_sim_def]) 1);
   291   by (asm_full_simp_tac (simpset() addsimps [corresp_ex_sim_def]) 1);
   292   by (res_inst_tac [("s","s")] correspsim_is_execution 1);
   292   by (res_inst_tac [("s","s")] correspsim_is_execution 1);
   293   ba 1;
   293   by (assume_tac 1);
   294   by (asm_full_simp_tac (simpset() addsimps [reachable.reachable_0,sim_starts1]) 1);
   294   by (asm_full_simp_tac (simpset() addsimps [reachable.reachable_0,sim_starts1]) 1);
   295 qed"trace_inclusion_for_simulations"; 
   295 qed"trace_inclusion_for_simulations"; 
   296 
   296 
   297 
   297 
   298 
   298