src/Pure/thm.ML
changeset 134 595fda4879b6
parent 112 009ae5c85ae9
child 193 b2be328e00c3
equal deleted inserted replaced
133:2322fd6d57a1 134:595fda4879b6
   984               else let val thm = Thm{sign=sg1,hyps=[s'],prop=s',maxidx= ~1}
   984               else let val thm = Thm{sign=sg1,hyps=[s'],prop=s',maxidx= ~1}
   985                    in (mk_rews thm, add_prems(mss,[thm])) end
   985                    in (mk_rews thm, add_prems(mss,[thm])) end
   986             val unit = seq (trace_thm "Adding rewrite rule:") rthms
   986             val unit = seq (trace_thm "Adding rewrite rule:") rthms
   987             val mss' = add_simps(mss,rthms)
   987             val mss' = add_simps(mss,rthms)
   988             val ((sg2,hyps2),u') = botc mss' (sghy1,u)
   988             val ((sg2,hyps2),u') = botc mss' (sghy1,u)
   989         in ((sg2,hyps2\s'), Logic.mk_implies(s',u')) end
   989             val hyps2' = if s' mem hyps1 then hyps2 else hyps2\s'
       
   990         in ((sg2,hyps2'), Logic.mk_implies(s',u')) end
   990 
   991 
   991   in botc end;
   992   in botc end;
   992 
   993 
   993 
   994 
   994 (*** Meta-rewriting: rewrites t to u and returns the theorem t==u ***)
   995 (*** Meta-rewriting: rewrites t to u and returns the theorem t==u ***)