src/HOL/MicroJava/BV/BVSpecTypeSafe.ML
changeset 8624 69619f870939
parent 8442 96023903c2df
child 9260 678e718a5a86
equal deleted inserted replaced
8623:5668aaf41c36 8624:69619f870939
     2     ID:         $Id$
     2     ID:         $Id$
     3     Author:     Cornelia Pusch
     3     Author:     Cornelia Pusch
     4     Copyright   1999 Technische Universitaet Muenchen
     4     Copyright   1999 Technische Universitaet Muenchen
     5 *)
     5 *)
     6 
     6 
     7 val defs1 = exec.rules@[split_def,sup_state_def,correct_state_def,
     7 val defs1 = exec.simps@[split_def,sup_state_def,correct_state_def,
     8 		correct_frame_def,wt_instr_def];
     8 		correct_frame_def,wt_instr_def];
     9 
     9 
    10 Goalw [correct_state_def,Let_def,correct_frame_def,split_def]
    10 Goalw [correct_state_def,Let_def,correct_frame_def,split_def]
    11 "\\<lbrakk> wt_jvm_prog G phi; \
    11 "\\<lbrakk> wt_jvm_prog G phi; \
    12 \   method (G,C) sig = Some (C,rT,maxl,ins); \
    12 \   method (G,C) sig = Some (C,rT,maxl,ins); \
   539 \ \\<Longrightarrow> exec (G,state) = Some state' \\<longrightarrow> G,phi \\<turnstile>JVM state'\\<surd>";
   539 \ \\<Longrightarrow> exec (G,state) = Some state' \\<longrightarrow> G,phi \\<turnstile>JVM state'\\<surd>";
   540 by(split_all_tac 1);
   540 by(split_all_tac 1);
   541 by(rename_tac "xp hp frs" 1);
   541 by(rename_tac "xp hp frs" 1);
   542 by (case_tac "xp" 1);
   542 by (case_tac "xp" 1);
   543  by (case_tac "frs" 1);
   543  by (case_tac "frs" 1);
   544   by (asm_full_simp_tac (simpset() addsimps exec.rules) 1);
   544   by (asm_full_simp_tac (simpset() addsimps exec.simps) 1);
   545  by(split_all_tac 1);
   545  by(split_all_tac 1);
   546  by(hyp_subst_tac 1);
   546  by(hyp_subst_tac 1);
   547  by(forward_tac [correct_state_impl_Some_method] 1);
   547  by(forward_tac [correct_state_impl_Some_method] 1);
   548  by (force_tac (claset() addIs [LS_correct,CO_correct,MO_correct,CH_correct,MI_correct,MR_correct,OS_correct,
   548  by (force_tac (claset() addIs [LS_correct,CO_correct,MO_correct,CH_correct,MI_correct,MR_correct,OS_correct,
   549 	BR_correct], simpset() addsplits [split_if_asm,instr.split,instr.split_asm] addsimps exec.rules@[split_def]) 1);
   549 	BR_correct], simpset() addsplits [split_if_asm,instr.split,instr.split_asm] addsimps exec.simps@[split_def]) 1);
   550 by (case_tac "frs" 1);
   550 by (case_tac "frs" 1);
   551  by (ALLGOALS(asm_full_simp_tac (simpset() addsimps exec.rules)));
   551  by (ALLGOALS(asm_full_simp_tac (simpset() addsimps exec.simps)));
   552 qed_spec_mp "BV_correct_1";
   552 qed_spec_mp "BV_correct_1";
   553 
   553 
   554 (*******)
   554 (*******)
   555 Goal
   555 Goal
   556 "\\<lbrakk> xp=None; frs\\<noteq>[] \\<rbrakk> \\<Longrightarrow> (\\<exists>state'. exec (G,xp,hp,frs) = Some state')";
   556 "\\<lbrakk> xp=None; frs\\<noteq>[] \\<rbrakk> \\<Longrightarrow> (\\<exists>state'. exec (G,xp,hp,frs) = Some state')";