src/Pure/drule.ML
changeset 8086 78e254305ae6
parent 7898 d7e65a52acf9
child 8129 29e239c7b8c2
equal deleted inserted replaced
8085:dce06445aafd 8086:78e254305ae6
   564 
   564 
   565 (* (!!x. PROP ?V) == PROP ?V       Allows removal of redundant parameters*)
   565 (* (!!x. PROP ?V) == PROP ?V       Allows removal of redundant parameters*)
   566 val triv_forall_equality =
   566 val triv_forall_equality =
   567   let val V  = read_prop "PROP V"
   567   let val V  = read_prop "PROP V"
   568       and QV = read_prop "!!x::'a. PROP V"
   568       and QV = read_prop "!!x::'a. PROP V"
   569       and x  = read_cterm proto_sign ("x", TFree("'a",logicS));
   569       and x  = read_cterm proto_sign ("x", TypeInfer.logicT);
   570   in
   570   in
   571     store_thm "triv_forall_equality"
   571     store_thm "triv_forall_equality"
   572       (equal_intr (implies_intr QV (forall_elim x (assume QV)))
   572       (equal_intr (implies_intr QV (forall_elim x (assume QV)))
   573         (implies_intr V  (forall_intr x (assume V))))
   573         (implies_intr V  (forall_intr x (assume V))))
   574   end;
   574   end;