src/Pure/thm.ML
changeset 1028 88c8df00905b
parent 1023 f5f36bdc8003
child 1065 8425cb5acb77
equal deleted inserted replaced
1027:651637377289 1028:88c8df00905b
  1070   orelse
  1070   orelse
  1071    (exists (apl(lhs, Logic.occs)) (rhs::prems))
  1071    (exists (apl(lhs, Logic.occs)) (rhs::prems))
  1072   orelse
  1072   orelse
  1073    (null(prems) andalso
  1073    (null(prems) andalso
  1074     Pattern.matches (#tsig(Sign.rep_sg sign)) (lhs,rhs));
  1074     Pattern.matches (#tsig(Sign.rep_sg sign)) (lhs,rhs));
       
  1075 (* the condition "null(prems)" in the last case is necessary because
       
  1076    conditional rewrites with extra variables in the conditions may terminate
       
  1077    although the rhs is an instance of the lhs. Example:
       
  1078    ?m < ?n ==> f(?n) == f(?m)
       
  1079 *)
  1075 
  1080 
  1076 fun mk_rrule (thm as Thm{hyps,sign,prop,maxidx,...}) =
  1081 fun mk_rrule (thm as Thm{hyps,sign,prop,maxidx,...}) =
  1077   let val prems = Logic.strip_imp_prems prop
  1082   let val prems = Logic.strip_imp_prems prop
  1078       val concl = Logic.strip_imp_concl prop
  1083       val concl = Logic.strip_imp_concl prop
  1079       val (lhs,_) = Logic.dest_equals concl handle TERM _ =>
  1084       val (lhs,_) = Logic.dest_equals concl handle TERM _ =>