src/ZF/Univ.ML
changeset 853 a4b286dfdd6f
parent 828 03d7bfa70289
child 1461 6bcb44e4d6e5
equal deleted inserted replaced
852:664052e3cf66 853:a4b286dfdd6f
   160 (*opposite inclusion*)
   160 (*opposite inclusion*)
   161 by (rtac UN_least 1);
   161 by (rtac UN_least 1);
   162 by (rtac (Vfrom RS ssubst) 1);
   162 by (rtac (Vfrom RS ssubst) 1);
   163 by (fast_tac ZF_cs 1);
   163 by (fast_tac ZF_cs 1);
   164 qed "Vfrom_Union";
   164 qed "Vfrom_Union";
   165 
       
   166 goal Univ.thy "!!i. Ord(i) ==> i=0 | (EX j. i=succ(j)) | Limit(i)";
       
   167 by (fast_tac (ZF_cs addSIs [non_succ_LimitI, Ord_0_lt]) 1);
       
   168 qed "Ord_cases_lemma";
       
   169 
       
   170 val major::prems = goal Univ.thy
       
   171     "[| Ord(i);			\
       
   172 \       i=0            ==> P;	\
       
   173 \       !!j. i=succ(j) ==> P;	\
       
   174 \       Limit(i)       ==> P	\
       
   175 \    |] ==> P";
       
   176 by (cut_facts_tac [major RS Ord_cases_lemma] 1);
       
   177 by (REPEAT (eresolve_tac (prems@[disjE, exE]) 1));
       
   178 qed "Ord_cases";
       
   179 
       
   180 
   165 
   181 (*** Vfrom applied to Limit ordinals ***)
   166 (*** Vfrom applied to Limit ordinals ***)
   182 
   167 
   183 (*NB. limit ordinals are non-empty;
   168 (*NB. limit ordinals are non-empty;
   184                         Vfrom(A,0) = A = A Un (UN y:0. Vfrom(A,y)) *)
   169                         Vfrom(A,0) = A = A Un (UN y:0. Vfrom(A,y)) *)