src/HOL/Decision_Procs/mir_tac.ML
changeset 54230 b1d955791529
parent 52131 366fa32ee2a3
child 54742 7a86358a3c0b
equal deleted inserted replaced
54229:ca638d713ff8 54230:b1d955791529
    32              @{thm "real_of_nat_Suc"}, @{thm "real_of_nat_one"}, @{thm "real_of_one"},
    32              @{thm "real_of_nat_Suc"}, @{thm "real_of_nat_one"}, @{thm "real_of_one"},
    33              @{thm "real_of_int_zero"}, @{thm "real_of_nat_zero"},
    33              @{thm "real_of_int_zero"}, @{thm "real_of_nat_zero"},
    34              @{thm "divide_zero"}, 
    34              @{thm "divide_zero"}, 
    35              @{thm "divide_divide_eq_left"}, @{thm "times_divide_eq_right"}, 
    35              @{thm "divide_divide_eq_left"}, @{thm "times_divide_eq_right"}, 
    36              @{thm "times_divide_eq_left"}, @{thm "divide_divide_eq_right"},
    36              @{thm "times_divide_eq_left"}, @{thm "divide_divide_eq_right"},
    37              @{thm "diff_minus"}, @{thm "minus_divide_left"}]
    37              @{thm uminus_add_conv_diff [symmetric]}, @{thm "minus_divide_left"}]
    38 val comp_ths = ths @ comp_arith @ @{thms simp_thms};
    38 val comp_ths = ths @ comp_arith @ @{thms simp_thms};
    39 
    39 
    40 
    40 
    41 val zdvd_int = @{thm "zdvd_int"};
    41 val zdvd_int = @{thm "zdvd_int"};
    42 val zdiff_int_split = @{thm "zdiff_int_split"};
    42 val zdiff_int_split = @{thm "zdiff_int_split"};