src/HOL/ROOT
changeset 58313 57d2e5006d29
parent 58312 710f56e192fe
child 58329 a31404ec7414
--- a/src/HOL/ROOT	Thu Sep 11 19:38:22 2014 +0200
+++ b/src/HOL/ROOT	Thu Sep 11 19:39:48 2014 +0200
@@ -751,7 +751,7 @@
   theories [condition = ISABELLE_FULL_TEST, timing]
     Brackin
     Instructions
-    IsaFoR_Datatypes
+    IsaFoR
     SML
     Verilog