src/HOL/SMT/Examples/cert/z3_bv_02
changeset 34010 ac78f5cdc430
parent 33010 39f73a59e855
--- a/src/HOL/SMT/Examples/cert/z3_bv_02	Tue Dec 01 22:29:46 2009 +0000
+++ b/src/HOL/SMT/Examples/cert/z3_bv_02	Thu Dec 03 15:56:06 2009 +0100
@@ -1,12 +1,12 @@
 (benchmark Isabelle
 :extrasorts ( T2 T1)
 :extrafuns (
-  (uf_2 T1)
-  (uf_1 BitVec[4] BitVec[4] T1)
-  (uf_3 T1 T2)
-  (uf_4 BitVec[4])
+  (uf_4 T1)
+  (uf_2 BitVec[4] BitVec[4] T1)
+  (uf_1 T1 T2)
+  (uf_3 BitVec[4])
  )
-:assumption (forall (?x1 BitVec[4]) (?x2 BitVec[4]) (iff (= (uf_1 ?x1 ?x2) uf_2) (bvule ?x1 ?x2)))
-:assumption (not (= (uf_3 (uf_1 bv0[4] uf_4)) (uf_3 uf_2)))
+:assumption (not (= (uf_1 (uf_2 bv0[4] uf_3)) (uf_1 uf_4)))
+:assumption (forall (?x1 BitVec[4]) (?x2 BitVec[4]) (iff (= (uf_2 ?x1 ?x2) uf_4) (bvule ?x1 ?x2)))
 :formula true
 )