src/Pure/raw_simplifier.ML
changeset 74282 c2ee8d993d6a
parent 74266 612b7e0d6721
child 74509 f24ade4ff3cc
--- a/src/Pure/raw_simplifier.ML	Thu Sep 09 23:07:02 2021 +0200
+++ b/src/Pure/raw_simplifier.ML	Fri Sep 10 14:59:19 2021 +0200
@@ -1226,7 +1226,8 @@
         val (lhs, rhs) = Thm.dest_equals (Thm.cprop_of eq);
         val eq' =
           Thm.implies_elim
-            (Thm.instantiate ([], [(vA, prem), (vB, lhs), (vC, rhs)]) Drule.imp_cong)
+            (Thm.instantiate (TVars.empty, Vars.make [(vA, prem), (vB, lhs), (vC, rhs)])
+              Drule.imp_cong)
             (Thm.implies_intr prem eq);
       in
         if not r then eq'
@@ -1237,9 +1238,11 @@
           in
             Thm.transitive
               (Thm.transitive
-                (Thm.instantiate ([], [(vA, prem'), (vB, prem), (vC, concl)]) Drule.swap_prems_eq)
+                (Thm.instantiate (TVars.empty, Vars.make [(vA, prem'), (vB, prem), (vC, concl)])
+                  Drule.swap_prems_eq)
                 eq')
-              (Thm.instantiate ([], [(vA, prem), (vB, prem''), (vC, concl)]) Drule.swap_prems_eq)
+              (Thm.instantiate (TVars.empty, Vars.make [(vA, prem), (vB, prem''), (vC, concl)])
+                Drule.swap_prems_eq)
           end
       end