author | haftmann |
Mon, 05 Oct 2009 11:48:06 +0200 | |
changeset 32871 | 36fa392ba61a |
parent 32870 | e23a35f5400d |
child 32875 | 0fbaf49367ff |
child 32876 | c34b072518c9 |
--- a/Admin/Benchmarks/HOL-datatype/ROOT.ML Mon Oct 05 11:47:38 2009 +0200 +++ b/Admin/Benchmarks/HOL-datatype/ROOT.ML Mon Oct 05 11:48:06 2009 +0200 @@ -5,7 +5,7 @@ val tests = ["Brackin", "Instructions", "SML", "Verilog"]; -set timing; +Unsynchronized.set timing; warning "\nset quick_and_dirty\n"; Unsynchronized.set quick_and_dirty; List.app time_use_thy tests;