author | wenzelm |
Wed, 07 Sep 2005 20:22:39 +0200 | |
changeset 17309 | c43ed29bd197 |
parent 10231 | 178a272bceeb |
permissions | -rw-r--r-- |
17309 | 1 |
(* |
3807 | 2 |
File: Memory.ML |
17309 | 3 |
ID: $Id$ |
3807 | 4 |
Author: Stephan Merz |
5 |
Copyright: 1997 University of Munich |
|
6 |
||
6255 | 7 |
RPC-Memory example: Memory specification (theorems and proofs) |
3807 | 8 |
*) |
9 |
||
17309 | 10 |
val RM_action_defs = |
6255 | 11 |
[MInit_def, PInit_def, RdRequest_def, WrRequest_def, MemInv_def, |
12 |
GoodRead_def, BadRead_def, ReadInner_def, Read_def, |
|
13 |
GoodWrite_def, BadWrite_def, WriteInner_def, Write_def, |
|
14 |
MemReturn_def, RNext_def]; |
|
3807 | 15 |
|
16 |
val UM_action_defs = RM_action_defs @ [MemFail_def, UNext_def]; |
|
17 |
||
18 |
val RM_temp_defs = [RPSpec_def, MSpec_def, IRSpec_def]; |
|
19 |
val UM_temp_defs = [UPSpec_def, MSpec_def, IUSpec_def]; |
|
20 |
||
6255 | 21 |
val mem_css = (claset(), simpset()); |
3807 | 22 |
|
4828 | 23 |
(* -------------------- Proofs ---------------------------------------------- *) |
3807 | 24 |
|
25 |
(* The reliable memory is an implementation of the unreliable one *) |
|
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
26 |
Goal "|- IRSpec ch mm rs --> IUSpec ch mm rs"; |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
27 |
by (force_tac (temp_css addsimps2 ([UNext_def,UPSpec_def,IUSpec_def] @ RM_temp_defs) |
17309 | 28 |
addSEs2 [STL4E,squareE]) 1); |
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
29 |
qed "ReliableImplementsUnReliable"; |
3807 | 30 |
|
31 |
(* The memory spec implies the memory invariant *) |
|
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
32 |
Goal "|- MSpec ch mm rs l --> [](MemInv mm l)"; |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
33 |
by (auto_inv_tac (simpset() addsimps RM_temp_defs @ RM_action_defs) 1); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
34 |
qed "MemoryInvariant"; |
3807 | 35 |
|
36 |
(* The invariant is trivial for non-locations *) |
|
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
37 |
Goal "|- #l ~: #MemLoc --> [](MemInv mm l)"; |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
38 |
by (auto_tac (temp_css addsimps2 [MemInv_def] addSIs2 [necT])); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
39 |
qed "NonMemLocInvariant"; |
3807 | 40 |
|
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
41 |
Goal "|- (ALL l. #l : #MemLoc --> MSpec ch mm rs l) --> (ALL l. [](MemInv mm l))"; |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
42 |
by (step_tac temp_cs 1); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
43 |
by (case_tac "l : MemLoc" 1); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
44 |
by (auto_tac (temp_css addSEs2 [MemoryInvariant,NonMemLocInvariant])); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
45 |
qed "MemoryInvariantAll"; |
3807 | 46 |
|
17309 | 47 |
(* The memory engages in an action for process p only if there is an |
4828 | 48 |
unanswered call from p. |
3807 | 49 |
We need this only for the reliable memory. |
50 |
*) |
|
51 |
||
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
52 |
Goal "|- ~$(Calling ch p) --> ~ RNext ch mm rs p"; |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
53 |
by (auto_tac (mem_css addsimps2 (Return_def::RM_action_defs))); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
54 |
qed "Memoryidle"; |
3807 | 55 |
|
56 |
(* Enabledness conditions *) |
|
57 |
||
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
58 |
Goal "|- MemReturn ch rs p --> <MemReturn ch rs p>_(rtrner ch ! p, rs!p)"; |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
59 |
by (force_tac (mem_css addsimps2 [MemReturn_def,angle_def]) 1); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
60 |
qed "MemReturn_change"; |
3807 | 61 |
|
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
62 |
Goal "!!p. basevars (rtrner ch ! p, rs!p) ==> \ |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
63 |
\ |- Calling ch p & (rs!p ~= #NotAResult) \ |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
64 |
\ --> Enabled (<MemReturn ch rs p>_(rtrner ch ! p, rs!p))"; |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
65 |
by (action_simp_tac (simpset()) [MemReturn_change RSN (2,enabled_mono)] [] 1); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
66 |
by (action_simp_tac (simpset() addsimps [MemReturn_def,Return_def,rtrner_def]) |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
67 |
[exI] [base_enabled,Pair_inject] 1); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
68 |
qed "MemReturn_enabled"; |
3807 | 69 |
|
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
70 |
Goal "!!p. basevars (rtrner ch ! p, rs!p) ==> \ |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
71 |
\ |- Calling ch p & (arg<ch!p> = #(read l)) --> Enabled (ReadInner ch mm rs p l)"; |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
72 |
by (case_tac "l : MemLoc" 1); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
73 |
by (ALLGOALS |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
74 |
(force_tac (mem_css addsimps2 [ReadInner_def,GoodRead_def, |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
75 |
BadRead_def,RdRequest_def] |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
76 |
addSIs2 [exI] addSEs2 [base_enabled]))); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
77 |
qed "ReadInner_enabled"; |
3807 | 78 |
|
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
79 |
Goal "!!p. basevars (mm!l, rtrner ch ! p, rs!p) ==> \ |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
80 |
\ |- Calling ch p & (arg<ch!p> = #(write l v)) \ |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
81 |
\ --> Enabled (WriteInner ch mm rs p l v)"; |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
82 |
by (case_tac "l:MemLoc & v:MemVal" 1); |
17309 | 83 |
by (ALLGOALS |
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
84 |
(force_tac (mem_css addsimps2 [WriteInner_def,GoodWrite_def, |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
85 |
BadWrite_def,WrRequest_def] |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
86 |
addSIs2 [exI] addSEs2 [base_enabled]))); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
87 |
qed "WriteInner_enabled"; |
3807 | 88 |
|
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
89 |
Goal "|- Read ch mm rs p & (!l. $(MemInv mm l)) --> (rs!p)` ~= #NotAResult"; |
17309 | 90 |
by (force_tac (mem_css addsimps2 |
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
91 |
[Read_def,ReadInner_def,GoodRead_def,BadRead_def,MemInv_def]) 1); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
92 |
qed "ReadResult"; |
3807 | 93 |
|
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
94 |
Goal "|- Write ch mm rs p l --> (rs!p)` ~= #NotAResult"; |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
95 |
by (auto_tac (mem_css addsimps2 ([Write_def,WriteInner_def,GoodWrite_def,BadWrite_def]))); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
96 |
qed "WriteResult"; |
3807 | 97 |
|
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
98 |
Goal "|- (ALL l. $MemInv mm l) & MemReturn ch rs p \ |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
99 |
\ --> ~ Read ch mm rs p & (ALL l. ~ Write ch mm rs p l)"; |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
100 |
by (auto_tac (mem_css addsimps2 [MemReturn_def] addSDs2 [WriteResult, ReadResult])); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
101 |
qed "ReturnNotReadWrite"; |
3807 | 102 |
|
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
103 |
Goal "|- (rs!p = #NotAResult) & (!l. MemInv mm l) \ |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
104 |
\ & Enabled (Read ch mm rs p | (? l. Write ch mm rs p l)) \ |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
105 |
\ --> Enabled (<RNext ch mm rs p>_(rtrner ch ! p, rs!p))"; |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
106 |
by (force_tac (mem_css addsimps2 [RNext_def,angle_def] |
17309 | 107 |
addSEs2 [enabled_mono2] |
108 |
addDs2 [ReadResult, WriteResult]) 1); |
|
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
109 |
qed "RWRNext_enabled"; |
3807 | 110 |
|
111 |
||
112 |
(* Combine previous lemmas: the memory can make a visible step if there is an |
|
113 |
outstanding call for which no result has been produced. |
|
114 |
*) |
|
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
115 |
Goal "!!p. !l. basevars (mm!l, rtrner ch!p, rs!p) ==> \ |
6255 | 116 |
\ |- (rs!p = #NotAResult) & Calling ch p & (!l. MemInv mm l) \ |
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
117 |
\ --> Enabled (<RNext ch mm rs p>_(rtrner ch ! p, rs!p))"; |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
118 |
by (auto_tac (mem_css addsimps2 [enabled_disj] addSIs2 [RWRNext_enabled])); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
119 |
by (case_tac "arg(ch w p)" 1); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
120 |
by (action_simp_tac (simpset()addsimps[Read_def,enabled_ex]) |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
121 |
[ReadInner_enabled,exI] [] 1); |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
122 |
by (force_tac (mem_css addDs2 [base_pair]) 1); |
10231 | 123 |
by (etac contrapos_np 1); |
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
124 |
by (action_simp_tac (simpset() addsimps [Write_def,enabled_ex]) |
17309 | 125 |
[WriteInner_enabled,exI] [] 1); |
9517
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
8442
diff
changeset
|
126 |
qed "RNext_enabled"; |