src/HOL/MicroJava/BV/BVSpecTypeSafe.thy
author kleing
Sun, 16 Dec 2001 00:17:44 +0100
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(*  Title:      HOL/MicroJava/BV/BVSpecTypeSafe.thy
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    ID:         $Id$
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    Author:     Cornelia Pusch, Gerwin Klein
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    Copyright   1999 Technische Universitaet Muenchen
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*)
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header "BV Type Safety Proof"
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theory BVSpecTypeSafe = Correct:
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text {*
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  This theory contains proof that the specification of the bytecode
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  verifier only admits type safe programs.  
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*}
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section {* Preliminaries *}
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text {*
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  Simp and intro setup for the type safety proof:
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*}
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lemmas defs1 = sup_state_conv correct_state_def correct_frame_def 
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               wt_instr_def eff_def norm_eff_def 
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lemmas widen_rules[intro] = approx_val_widen approx_loc_widen approx_stk_widen
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lemmas [simp del] = split_paired_All
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text {*
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  If we have a welltyped program and a conforming state, we
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  can directly infer that the current instruction is well typed:
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*}
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lemma wt_jvm_prog_impl_wt_instr_cor:
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  "[| wt_jvm_prog G phi; method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
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      G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
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  ==> wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc"
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apply (unfold correct_state_def Let_def correct_frame_def)
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apply simp
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apply (blast intro: wt_jvm_prog_impl_wt_instr)
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done
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section {* Exception Handling *}
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text {*
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  Exceptions don't touch anything except the stack:
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*}
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lemma exec_instr_xcpt:
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  "(fst (exec_instr i G hp stk vars Cl sig pc frs) = Some xcp)
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  = (\<exists>stk'. exec_instr i G hp stk vars Cl sig pc frs = 
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            (Some xcp, hp, (stk', vars, Cl, sig, pc)#frs))"
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  by (cases i, auto simp add: split_beta split: split_if_asm)
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text {*
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  Relates @{text match_any} from the Bytecode Verifier with 
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  @{text match_exception_table} from the operational semantics:
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*}
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lemma in_match_any:
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  "match_exception_table G xcpt pc et = Some pc' ==> 
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  \<exists>C. C \<in> set (match_any G pc et) \<and> G \<turnstile> xcpt \<preceq>C C \<and> 
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      match_exception_table G C pc et = Some pc'"
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  (is "PROP ?P et" is "?match et ==> ?match_any et")
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proof (induct et)  
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  show "PROP ?P []" 
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    by simp
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  fix e es
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  assume IH: "PROP ?P es"
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  assume match: "?match (e#es)"
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  obtain start_pc end_pc handler_pc catch_type where
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    e [simp]: "e = (start_pc, end_pc, handler_pc, catch_type)"
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    by (cases e) 
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  from IH match
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  show "?match_any (e#es)" 
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  proof (cases "match_exception_entry G xcpt pc e")
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    case False
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    with match
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    have "match_exception_table G xcpt pc es = Some pc'" by simp
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    with IH
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    obtain C where
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      set: "C \<in> set (match_any G pc es)" and
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      C:   "G \<turnstile> xcpt \<preceq>C C" and
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      m:   "match_exception_table G C pc es = Some pc'" by blast
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    from set
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    have "C \<in> set (match_any G pc (e#es))" by simp
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    moreover
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    from False C
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    have "\<not> match_exception_entry G C pc e"
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      by - (erule contrapos_nn, 
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            auto simp add: match_exception_entry_def elim: rtrancl_trans)
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    with m
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    have "match_exception_table G C pc (e#es) = Some pc'" by simp
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    moreover note C
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    ultimately
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    show ?thesis by blast
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  next
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    case True with match
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    have "match_exception_entry G catch_type pc e"
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      by (simp add: match_exception_entry_def)
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    moreover
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    from True match
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    obtain 
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      "start_pc \<le> pc" 
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      "pc < end_pc" 
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      "G \<turnstile> xcpt \<preceq>C catch_type" 
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      "handler_pc = pc'" 
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      by (simp add: match_exception_entry_def)
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    ultimately
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    show ?thesis by auto
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  qed
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qed
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text {*
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  We can prove separately that the recursive search for exception
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  handlers (@{text find_handler}) in the frame stack results in 
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  a conforming state (if there was no matching exception handler 
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  in the current frame). We require that the exception is a valid
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  heap address, and that the state before the exception occured
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  conforms. 
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*}
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lemma uncaught_xcpt_correct:
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  "!!f. [| wt_jvm_prog G phi; xcp = Addr adr; hp adr = Some T;
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      G,phi \<turnstile>JVM (None, hp, f#frs)\<surd> |]
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  ==> G,phi \<turnstile>JVM (find_handler G (Some xcp) hp frs)\<surd>" 
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  (is "!!f. [| ?wt; ?adr; ?hp; ?correct (None, hp, f#frs) |] ==> ?correct (?find frs)")
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proof (induct frs) 
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  -- "the base case is trivial, as it should be"
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  show "?correct (?find [])" by (simp add: correct_state_def)
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  -- "we will need both forms @{text wt_jvm_prog} and @{text wf_prog} later"
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  assume wt: ?wt 
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  then obtain mb where wf: "wf_prog mb G" by (simp add: wt_jvm_prog_def)
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  -- "these two don't change in the induction:"
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  assume adr: ?adr
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  assume hp: ?hp
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  -- "the assumption for the cons case:"
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  fix f f' frs' 
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  assume cr: "?correct (None, hp, f#f'#frs')" 
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  -- "the induction hypothesis as produced by Isabelle, immediatly simplified
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    with the fixed assumptions above"
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  assume "\<And>f. [| ?wt; ?adr; ?hp; ?correct (None, hp, f#frs') |] ==> ?correct (?find frs')"  
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  with wt adr hp 
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  have IH: "\<And>f. ?correct (None, hp, f#frs') ==> ?correct (?find frs')" by blast
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  from cr
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  have cr': "?correct (None, hp, f'#frs')" by (auto simp add: correct_state_def)
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  obtain stk loc C sig pc where f' [simp]: "f' = (stk,loc,C,sig,pc)"
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    by (cases f') 
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  from cr 
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  obtain rT maxs maxl ins et where
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    meth: "method (G,C) sig = Some (C,rT,maxs,maxl,ins,et)"
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    by (simp add: correct_state_def, blast)
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  hence [simp]: "ex_table_of (snd (snd (the (method (G, C) sig)))) = et"
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    by simp
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  show "?correct (?find (f'#frs'))" 
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  proof (cases "match_exception_table G (cname_of hp xcp) pc et")
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    case None
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    with cr' IH 
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    show ?thesis by simp
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  next
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    fix handler_pc 
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    assume match: "match_exception_table G (cname_of hp xcp) pc et = Some handler_pc"
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    (is "?match (cname_of hp xcp) = _")
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    from wt meth cr' [simplified]
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    have wti: "wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc" 
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      by (rule wt_jvm_prog_impl_wt_instr_cor)
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    from cr meth
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    obtain C' mn pts ST LT where
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      ins: "ins!pc = Invoke C' mn pts" (is "_ = ?i") and
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      phi: "phi C sig ! pc = Some (ST, LT)"
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      by (simp add: correct_state_def) blast    
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   185
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   186
    from match
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   187
    obtain D where
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   188
      in_any: "D \<in> set (match_any G pc et)" and
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   189
      D:      "G \<turnstile> cname_of hp xcp \<preceq>C D" and
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   190
      match': "?match D = Some handler_pc"
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   191
      by (blast dest: in_match_any)
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   192
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   193
    from ins wti phi have 
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   194
      "\<forall>D\<in>set (match_any G pc et). the (?match D) < length ins \<and> 
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   195
      G \<turnstile> Some ([Class D], LT) <=' phi C sig!the (?match D)"
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   196
      by (simp add: wt_instr_def eff_def xcpt_eff_def)      
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   197
    with in_any match' obtain
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      pc: "handler_pc < length ins" 
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      "G \<turnstile> Some ([Class D], LT) <=' phi C sig ! handler_pc"
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   200
      by auto
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   201
    then obtain ST' LT' where
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   202
      phi': "phi C sig ! handler_pc = Some (ST',LT')" and
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   203
      less: "G \<turnstile> ([Class D], LT) <=s (ST',LT')"
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   204
      by auto    
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   205
    
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    from cr' phi meth f'
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   207
    have "correct_frame G hp (ST, LT) maxl ins f'"
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   208
      by (unfold correct_state_def) auto
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   209
    then obtain
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     len: "length loc = 1+length (snd sig)+maxl" and
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   211
     loc: "approx_loc G hp loc LT"
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   212
      by (unfold correct_frame_def) auto
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   213
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   214
    let ?f = "([xcp], loc, C, sig, handler_pc)"
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   215
    have "correct_frame G hp (ST', LT') maxl ins ?f" 
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   216
    proof -
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   217
      from wf less loc
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   218
      have "approx_loc G hp loc LT'" by (simp add: sup_state_conv) blast
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   219
      moreover
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   220
      from D adr hp
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   221
      have "G,hp \<turnstile> xcp ::\<preceq> Class D" by (simp add: conf_def obj_ty_def)
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   222
      with wf less loc
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   223
      have "approx_stk G hp [xcp] ST'"
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   224
        by (auto simp add: sup_state_conv approx_stk_def approx_val_def 
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   225
                 elim: conf_widen split: Err.split)
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   226
      moreover
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   227
      note len pc
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   228
      ultimately
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   229
      show ?thesis by (simp add: correct_frame_def)
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   230
    qed
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   231
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   232
    with cr' match phi' meth  
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   233
    show ?thesis by (unfold correct_state_def) auto
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   234
  qed
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   235
qed
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   236
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   237
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   238
text {*
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   239
  The requirement of lemma @{text uncaught_xcpt_correct} (that
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  the exception is a valid reference on the heap) is always met
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  for welltyped instructions and conformant states:
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   242
*}
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   243
lemma exec_instr_xcpt_hp:
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   244
  "[|  fst (exec_instr (ins!pc) G hp stk vars Cl sig pc frs) = Some xcp;
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   245
       wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc;
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   246
       G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |]
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   247
  ==> \<exists>adr T. xcp = Addr adr \<and> hp adr = Some T" 
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   248
  (is "[| ?xcpt; ?wt; ?correct |] ==> ?thesis")
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   249
proof -
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   250
  note [simp] = system_xcpt_allocated split_beta raise_system_xcpt_def
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   251
  note [split] = split_if_asm option.split_asm 
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   252
  
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   253
  assume wt: ?wt ?correct
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   254
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   255
  assume xcpt: ?xcpt
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   256
  thus ?thesis 
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   257
  proof (cases "ins!pc")
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   258
    case New with xcpt
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   259
    show ?thesis by (auto dest: new_Addr_OutOfMemory)
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   260
  next
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   261
    case Throw with xcpt wt
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   262
    show ?thesis
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   263
      by (auto simp add: wt_instr_def correct_state_def correct_frame_def 
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   264
               dest: non_npD)
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   265
  qed auto
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   266
qed
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   267
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   268
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   269
text {*
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   270
  Finally we can state that, whenever an exception occurs, the
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   271
  resulting next state always conforms:
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   272
*}
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   273
lemma xcpt_correct:
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   274
  "[| wt_jvm_prog G phi;
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   275
      method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
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   276
      wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
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   277
      fst (exec_instr (ins!pc) G hp stk loc C sig pc frs) = Some xcp; 
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   278
      Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs); 
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   279
      G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
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   280
  ==> G,phi \<turnstile>JVM state'\<surd>"
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   281
proof -
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   282
  assume wtp: "wt_jvm_prog G phi"
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   283
  assume meth: "method (G,C) sig = Some (C,rT,maxs,maxl,ins,et)"
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   284
  assume wt: "wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc"
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   285
  assume xp: "fst (exec_instr (ins!pc) G hp stk loc C sig pc frs) = Some xcp"
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   286
  assume s': "Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs)"
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   287
  assume correct: "G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd>"
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   288
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   289
  from wtp obtain wfmb where wf: "wf_prog wfmb G" by (simp add: wt_jvm_prog_def)
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   290
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   291
  note xp' = meth s' xp
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   292
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   293
  note wtp
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   294
  moreover
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   295
  from xp wt correct
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   296
  obtain adr T where
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   297
    adr: "xcp = Addr adr" "hp adr = Some T"
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   298
    by (blast dest: exec_instr_xcpt_hp)
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   299
  moreover
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   300
  note correct
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   301
  ultimately
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   302
  have "G,phi \<turnstile>JVM find_handler G (Some xcp) hp frs \<surd>" by (rule uncaught_xcpt_correct)
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   303
  with xp'
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   304
  have "match_exception_table G (cname_of hp xcp) pc et = None \<Longrightarrow> ?thesis" 
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   305
    (is "?m (cname_of hp xcp) = _ \<Longrightarrow> _" is "?match = _ \<Longrightarrow> _")
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   306
    by (clarsimp simp add: exec_instr_xcpt split_beta)
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   307
  moreover
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   308
  { fix handler
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   309
    assume some_handler: "?match = Some handler"
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   310
    
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   311
    from correct meth
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   312
    obtain ST LT where
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   313
      hp_ok:  "G \<turnstile>h hp \<surd>" and
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   314
      class:  "is_class G C" and
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   315
      phi_pc: "phi C sig ! pc = Some (ST, LT)" and
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   316
      frame:  "correct_frame G hp (ST, LT) maxl ins (stk, loc, C, sig, pc)" and
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diff changeset
   317
      frames: "correct_frames G hp phi rT sig frs"
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diff changeset
   318
      by (unfold correct_state_def) auto
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diff changeset
   319
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   320
    from frame obtain 
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   321
      stk: "approx_stk G hp stk ST" and
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   322
      loc: "approx_loc G hp loc LT" and
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   323
      pc:  "pc < length ins" and
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   324
      len: "length loc = 1+length (snd sig)+maxl"
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diff changeset
   325
      by (unfold correct_frame_def) auto
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diff changeset
   326
    
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   327
    from wt obtain
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   328
      eff: "\<forall>(pc', s')\<in>set (xcpt_eff (ins!pc) G pc (phi C sig!pc) et).
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diff changeset
   329
             pc' < length ins \<and> G \<turnstile> s' <=' phi C sig!pc'"
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   330
      by (simp add: wt_instr_def eff_def)
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diff changeset
   331
    
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   332
    from some_handler xp'
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diff changeset
   333
    have state': 
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   334
      "state' = (None, hp, ([xcp], loc, C, sig, handler)#frs)"
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diff changeset
   335
      by (cases "ins!pc", auto simp add: raise_system_xcpt_def split_beta 
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   336
                               split: split_if_asm) (* takes long! *)
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diff changeset
   337
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   338
    let ?f' = "([xcp], loc, C, sig, handler)"
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diff changeset
   339
    from eff
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diff changeset
   340
    obtain ST' LT' where
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diff changeset
   341
      phi_pc': "phi C sig ! handler = Some (ST', LT')" and
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diff changeset
   342
      frame': "correct_frame G hp (ST',LT') maxl ins ?f'" 
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diff changeset
   343
    proof (cases "ins!pc")
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   344
      case Return -- "can't generate exceptions:"
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diff changeset
   345
      with xp' have False by (simp add: split_beta split: split_if_asm)
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   346
      thus ?thesis ..
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   347
    next
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   348
      case New
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   349
      with some_handler xp'
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   350
      have xcp: "xcp = Addr (XcptRef OutOfMemory)"
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   351
        by (simp add: raise_system_xcpt_def split_beta new_Addr_OutOfMemory)
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diff changeset
   352
      hence "cname_of hp xcp = Xcpt OutOfMemory" 
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diff changeset
   353
        by (simp add: system_xcpt_allocated)
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diff changeset
   354
      with New some_handler phi_pc eff 
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diff changeset
   355
      obtain ST' LT' where
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diff changeset
   356
        phi': "phi C sig ! handler = Some (ST', LT')" and
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diff changeset
   357
        less: "G \<turnstile> ([Class (Xcpt OutOfMemory)], LT) <=s (ST', LT')" and
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diff changeset
   358
        pc':  "handler < length ins"
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diff changeset
   359
        by (simp add: xcpt_eff_def) blast
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diff changeset
   360
      note phi'
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diff changeset
   361
      moreover
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diff changeset
   362
      { from xcp
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diff changeset
   363
        have "G,hp \<turnstile> xcp ::\<preceq> Class (Xcpt OutOfMemory)"
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diff changeset
   364
          by (simp add: conf_def obj_ty_def system_xcpt_allocated)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   365
        moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   366
        from wf less loc
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   367
        have "approx_loc G hp loc LT'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   368
          by (simp add: sup_state_conv) blast        
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   369
        moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   370
        note wf less pc' len 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   371
        ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   372
        have "correct_frame G hp (ST',LT') maxl ins ?f'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   373
          by (unfold correct_frame_def) (auto simp add: sup_state_conv 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   374
              approx_stk_def approx_val_def split: err.split elim: conf_widen)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   375
      }
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   376
      ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   377
      show ?thesis by (rule that)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   378
    next 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   379
      case Getfield
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   380
      with some_handler xp'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   381
      have xcp: "xcp = Addr (XcptRef NullPointer)"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   382
        by (simp add: raise_system_xcpt_def split_beta split: split_if_asm)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   383
      hence "cname_of hp xcp = Xcpt NullPointer" 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   384
        by (simp add: system_xcpt_allocated)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   385
      with Getfield some_handler phi_pc eff 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   386
      obtain ST' LT' where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   387
        phi': "phi C sig ! handler = Some (ST', LT')" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   388
        less: "G \<turnstile> ([Class (Xcpt NullPointer)], LT) <=s (ST', LT')" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   389
        pc':  "handler < length ins"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   390
        by (simp add: xcpt_eff_def) blast
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   391
      note phi'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   392
      moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   393
      { from xcp
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   394
        have "G,hp \<turnstile> xcp ::\<preceq> Class (Xcpt NullPointer)"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   395
          by (simp add: conf_def obj_ty_def system_xcpt_allocated)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   396
        moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   397
        from wf less loc
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   398
        have "approx_loc G hp loc LT'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   399
          by (simp add: sup_state_conv) blast        
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   400
        moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   401
        note wf less pc' len 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   402
        ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   403
        have "correct_frame G hp (ST',LT') maxl ins ?f'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   404
          by (unfold correct_frame_def) (auto simp add: sup_state_conv 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   405
              approx_stk_def approx_val_def split: err.split elim: conf_widen)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   406
      }
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   407
      ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   408
      show ?thesis by (rule that)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   409
    next
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   410
      case Putfield
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   411
      with some_handler xp'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   412
      have xcp: "xcp = Addr (XcptRef NullPointer)"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   413
        by (simp add: raise_system_xcpt_def split_beta split: split_if_asm)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   414
      hence "cname_of hp xcp = Xcpt NullPointer" 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   415
        by (simp add: system_xcpt_allocated)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   416
      with Putfield some_handler phi_pc eff 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   417
      obtain ST' LT' where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   418
        phi': "phi C sig ! handler = Some (ST', LT')" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   419
        less: "G \<turnstile> ([Class (Xcpt NullPointer)], LT) <=s (ST', LT')" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   420
        pc':  "handler < length ins"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   421
        by (simp add: xcpt_eff_def) blast
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   422
      note phi'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   423
      moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   424
      { from xcp
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   425
        have "G,hp \<turnstile> xcp ::\<preceq> Class (Xcpt NullPointer)"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   426
          by (simp add: conf_def obj_ty_def system_xcpt_allocated)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   427
        moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   428
        from wf less loc
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   429
        have "approx_loc G hp loc LT'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   430
          by (simp add: sup_state_conv) blast        
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   431
        moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   432
        note wf less pc' len 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   433
        ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   434
        have "correct_frame G hp (ST',LT') maxl ins ?f'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   435
          by (unfold correct_frame_def) (auto simp add: sup_state_conv 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   436
              approx_stk_def approx_val_def split: err.split elim: conf_widen)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   437
      }
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   438
      ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   439
      show ?thesis by (rule that)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   440
    next
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   441
      case Checkcast
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   442
      with some_handler xp'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   443
      have xcp: "xcp = Addr (XcptRef ClassCast)"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   444
        by (simp add: raise_system_xcpt_def split_beta split: split_if_asm)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   445
      hence "cname_of hp xcp = Xcpt ClassCast" 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   446
        by (simp add: system_xcpt_allocated)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   447
      with Checkcast some_handler phi_pc eff 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   448
      obtain ST' LT' where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   449
        phi': "phi C sig ! handler = Some (ST', LT')" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   450
        less: "G \<turnstile> ([Class (Xcpt ClassCast)], LT) <=s (ST', LT')" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   451
        pc':  "handler < length ins"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   452
        by (simp add: xcpt_eff_def) blast
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   453
      note phi'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   454
      moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   455
      { from xcp
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   456
        have "G,hp \<turnstile> xcp ::\<preceq> Class (Xcpt ClassCast)"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   457
          by (simp add: conf_def obj_ty_def system_xcpt_allocated)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   458
        moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   459
        from wf less loc
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   460
        have "approx_loc G hp loc LT'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   461
          by (simp add: sup_state_conv) blast        
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   462
        moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   463
        note wf less pc' len 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   464
        ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   465
        have "correct_frame G hp (ST',LT') maxl ins ?f'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   466
          by (unfold correct_frame_def) (auto simp add: sup_state_conv 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   467
              approx_stk_def approx_val_def split: err.split elim: conf_widen)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   468
      }
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   469
      ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   470
      show ?thesis by (rule that)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   471
    next
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   472
      case Invoke
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   473
      with phi_pc eff 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   474
      have 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   475
        "\<forall>D\<in>set (match_any G pc et). 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   476
        the (?m D) < length ins \<and> G \<turnstile> Some ([Class D], LT) <=' phi C sig!the (?m D)"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   477
        by (simp add: xcpt_eff_def)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   478
      moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   479
      from some_handler
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   480
      obtain D where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   481
        "D \<in> set (match_any G pc et)" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   482
        D: "G \<turnstile> cname_of hp xcp \<preceq>C D" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   483
        "?m D = Some handler"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   484
        by (blast dest: in_match_any)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   485
      ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   486
      obtain 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   487
        pc': "handler < length ins" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   488
        "G \<turnstile> Some ([Class D], LT) <=' phi C sig ! handler"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   489
        by auto
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   490
      then
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   491
      obtain ST' LT' where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   492
        phi': "phi C sig ! handler = Some (ST', LT')" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   493
        less: "G \<turnstile> ([Class D], LT) <=s (ST', LT')" 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   494
        by auto
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   495
      from xp wt correct
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   496
      obtain addr T where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   497
        xcp: "xcp = Addr addr" "hp addr = Some T"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   498
        by (blast dest: exec_instr_xcpt_hp)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   499
      note phi'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   500
      moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   501
      { from xcp D
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   502
        have "G,hp \<turnstile> xcp ::\<preceq> Class D"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   503
          by (simp add: conf_def obj_ty_def)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   504
        moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   505
        from wf less loc
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   506
        have "approx_loc G hp loc LT'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   507
          by (simp add: sup_state_conv) blast        
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   508
        moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   509
        note wf less pc' len 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   510
        ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   511
        have "correct_frame G hp (ST',LT') maxl ins ?f'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   512
          by (unfold correct_frame_def) (auto simp add: sup_state_conv 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   513
              approx_stk_def approx_val_def split: err.split elim: conf_widen)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   514
      }
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   515
      ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   516
      show ?thesis by (rule that)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   517
    next
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   518
      case Throw
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   519
      with phi_pc eff 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   520
      have 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   521
        "\<forall>D\<in>set (match_any G pc et). 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   522
        the (?m D) < length ins \<and> G \<turnstile> Some ([Class D], LT) <=' phi C sig!the (?m D)"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   523
        by (simp add: xcpt_eff_def)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   524
      moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   525
      from some_handler
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   526
      obtain D where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   527
        "D \<in> set (match_any G pc et)" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   528
        D: "G \<turnstile> cname_of hp xcp \<preceq>C D" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   529
        "?m D = Some handler"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   530
        by (blast dest: in_match_any)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   531
      ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   532
      obtain 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   533
        pc': "handler < length ins" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   534
        "G \<turnstile> Some ([Class D], LT) <=' phi C sig ! handler"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   535
        by auto
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   536
      then
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   537
      obtain ST' LT' where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   538
        phi': "phi C sig ! handler = Some (ST', LT')" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   539
        less: "G \<turnstile> ([Class D], LT) <=s (ST', LT')" 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   540
        by auto
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   541
      from xp wt correct
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   542
      obtain addr T where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   543
        xcp: "xcp = Addr addr" "hp addr = Some T"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   544
        by (blast dest: exec_instr_xcpt_hp)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   545
      note phi'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   546
      moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   547
      { from xcp D
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   548
        have "G,hp \<turnstile> xcp ::\<preceq> Class D"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   549
          by (simp add: conf_def obj_ty_def)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   550
        moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   551
        from wf less loc
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   552
        have "approx_loc G hp loc LT'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   553
          by (simp add: sup_state_conv) blast        
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   554
        moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   555
        note wf less pc' len 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   556
        ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   557
        have "correct_frame G hp (ST',LT') maxl ins ?f'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   558
          by (unfold correct_frame_def) (auto simp add: sup_state_conv 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   559
              approx_stk_def approx_val_def split: err.split elim: conf_widen)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   560
      }
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   561
      ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   562
      show ?thesis by (rule that)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   563
    qed (insert xp', auto) -- "the other instructions don't generate exceptions"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   564
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   565
    from state' meth hp_ok class frames phi_pc' frame' 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   566
    have ?thesis by (unfold correct_state_def) simp
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   567
  }
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   568
  ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   569
  show ?thesis by (cases "?match") blast+ 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   570
qed
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   571
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   572
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   573
11085
b830bf10bf71 tuned for 99-2 release
kleing
parents: 10920
diff changeset
   574
section {* Single Instructions *}
b830bf10bf71 tuned for 99-2 release
kleing
parents: 10920
diff changeset
   575
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   576
text {*
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   577
  In this section we look at each single (welltyped) instruction, and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   578
  prove that the state after execution of the instruction still conforms.
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   579
  Since we have already handled exceptions above, we can now assume, that
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   580
  on exception occurs for this (single step) execution.
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   581
*}
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   582
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   583
lemmas [iff] = not_Err_eq
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   584
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   585
lemma Load_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   586
"[| wf_prog wt G;
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   587
    method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   588
    ins!pc = Load idx; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   589
    wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   590
    Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs); 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   591
    G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |]
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   592
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   593
apply (clarsimp simp add: defs1 map_eq_Cons)
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   594
apply (blast intro: approx_loc_imp_approx_val_sup)
9819
wenzelm
parents: 9757
diff changeset
   595
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   596
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   597
lemma Store_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   598
"[| wf_prog wt G;
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   599
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et);
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   600
  ins!pc = Store idx;
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   601
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc;
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   602
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs);
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   603
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |]
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   604
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   605
apply (clarsimp simp add: defs1 map_eq_Cons)
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   606
apply (blast intro: approx_loc_subst)
9819
wenzelm
parents: 9757
diff changeset
   607
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   608
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   609
10897
697fab84709e removed instructions Aconst_null+Bipush, introduced LitPush
kleing
parents: 10812
diff changeset
   610
lemma LitPush_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   611
"[| wf_prog wt G;
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   612
    method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
10897
697fab84709e removed instructions Aconst_null+Bipush, introduced LitPush
kleing
parents: 10812
diff changeset
   613
    ins!pc = LitPush v;
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   614
    wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   615
    Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs);
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   616
    G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |]
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   617
==> G,phi \<turnstile>JVM state'\<surd>" 
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   618
apply (clarsimp simp add: defs1 sup_PTS_eq map_eq_Cons)
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   619
apply (blast dest: conf_litval intro: conf_widen)
9819
wenzelm
parents: 9757
diff changeset
   620
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   621
10897
697fab84709e removed instructions Aconst_null+Bipush, introduced LitPush
kleing
parents: 10812
diff changeset
   622
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   623
lemma Cast_conf2:
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   624
  "[| wf_prog ok G; G,h\<turnstile>v::\<preceq>RefT rt; cast_ok G C h v; 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   625
      G\<turnstile>Class C\<preceq>T; is_class G C|] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   626
  ==> G,h\<turnstile>v::\<preceq>T"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   627
apply (unfold cast_ok_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   628
apply (frule widen_Class)
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   629
apply (elim exE disjE) 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   630
 apply (simp add: null)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   631
apply (clarsimp simp add: conf_def obj_ty_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   632
apply (cases v)
10897
697fab84709e removed instructions Aconst_null+Bipush, introduced LitPush
kleing
parents: 10812
diff changeset
   633
apply (auto intro: rtrancl_trans)
9819
wenzelm
parents: 9757
diff changeset
   634
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   635
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   636
lemmas defs1 = defs1 raise_system_xcpt_def
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   637
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   638
lemma Checkcast_correct:
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   639
"[| wt_jvm_prog G phi;
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   640
    method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   641
    ins!pc = Checkcast D; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   642
    wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   643
    Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   644
    G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd>;
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   645
    fst (exec_instr (ins!pc) G hp stk loc C sig pc frs) = None |] 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   646
==> G,phi \<turnstile>JVM state'\<surd>"
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   647
apply (clarsimp simp add: defs1 wt_jvm_prog_def map_eq_Cons split: split_if_asm)
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   648
apply (blast intro: Cast_conf2)
9819
wenzelm
parents: 9757
diff changeset
   649
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   650
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   651
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   652
lemma Getfield_correct:
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   653
"[| wt_jvm_prog G phi;
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   654
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   655
  ins!pc = Getfield F D; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   656
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   657
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   658
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd>;
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   659
  fst (exec_instr (ins!pc) G hp stk loc C sig pc frs) = None |] 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   660
==> G,phi \<turnstile>JVM state'\<surd>"
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   661
apply (clarsimp simp add: defs1 map_eq_Cons wt_jvm_prog_def 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   662
                split: option.split split_if_asm)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   663
apply (frule conf_widen)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   664
apply assumption+
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   665
apply (drule conf_RefTD)
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   666
apply (clarsimp simp add: defs1)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   667
apply (rule conjI)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   668
 apply (drule widen_cfs_fields)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   669
 apply assumption+
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   670
 apply (erule conf_widen)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   671
 prefer 2
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   672
  apply assumption
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   673
 apply (simp add: hconf_def oconf_def lconf_def)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   674
 apply (elim allE)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   675
 apply (erule impE, assumption)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   676
 apply simp
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   677
 apply (elim allE)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   678
 apply (erule impE, assumption)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   679
 apply clarsimp
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   680
apply blast
9819
wenzelm
parents: 9757
diff changeset
   681
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   682
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   683
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   684
lemma Putfield_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   685
"[| wf_prog wt G;
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   686
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   687
  ins!pc = Putfield F D; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   688
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   689
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   690
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd>;
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   691
  fst (exec_instr (ins!pc) G hp stk loc C sig pc frs) = None |] 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   692
==> G,phi \<turnstile>JVM state'\<surd>"
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   693
apply (clarsimp simp add: defs1 split_beta split: option.split List.split split_if_asm)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   694
apply (frule conf_widen)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   695
prefer 2
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   696
  apply assumption
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   697
 apply assumption
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   698
apply (drule conf_RefTD)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   699
apply clarsimp
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   700
apply (blast 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   701
       intro: 
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   702
         hext_upd_obj approx_stk_sup_heap
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   703
         approx_loc_sup_heap 
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   704
         hconf_field_update
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   705
         correct_frames_field_update conf_widen 
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   706
       dest: 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
   707
         widen_cfs_fields)
9819
wenzelm
parents: 9757
diff changeset
   708
done
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   709
    
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   710
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   711
lemma New_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   712
"[| wf_prog wt G;
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   713
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
10920
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   714
  ins!pc = New X; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   715
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   716
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   717
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd>;
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   718
  fst (exec_instr (ins!pc) G hp stk loc C sig pc frs) = None |] 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   719
==> G,phi \<turnstile>JVM state'\<surd>"
10920
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   720
proof -
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   721
  assume wf:   "wf_prog wt G"
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   722
  assume meth: "method (G,C) sig = Some (C,rT,maxs,maxl,ins,et)"
10920
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   723
  assume ins:  "ins!pc = New X"
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   724
  assume wt:   "wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc"
10920
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   725
  assume exec: "Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs)"
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   726
  assume conf: "G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd>"
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   727
  assume no_x: "fst (exec_instr (ins!pc) G hp stk loc C sig pc frs) = None"
10920
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   728
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   729
  from ins conf meth
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   730
  obtain ST LT where
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   731
    heap_ok:    "G\<turnstile>h hp\<surd>" and
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   732
    phi_pc:     "phi C sig!pc = Some (ST,LT)" and
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   733
    is_class_C: "is_class G C" and
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   734
    frame:      "correct_frame G hp (ST,LT) maxl ins (stk, loc, C, sig, pc)" and
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   735
    frames:     "correct_frames G hp phi rT sig frs"
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   736
    by (auto simp add: correct_state_def iff del: not_None_eq)
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   737
10920
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   738
  from phi_pc ins wt
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   739
  obtain ST' LT' where
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   740
    is_class_X: "is_class G X" and
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   741
    maxs:       "length ST < maxs" and
10920
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   742
    suc_pc:     "Suc pc < length ins" and
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   743
    phi_suc:    "phi C sig ! Suc pc = Some (ST', LT')" and
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   744
    less:       "G \<turnstile> (Class X # ST, LT) <=s (ST', LT')"
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   745
    by (unfold wt_instr_def eff_def norm_eff_def) auto
10920
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   746
 
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   747
  obtain oref xp' where
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   748
    new_Addr: "new_Addr hp = (oref,xp')"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   749
    by (cases "new_Addr hp") 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   750
  with ins no_x
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   751
  obtain hp: "hp oref = None" and "xp' = None"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   752
    by (auto dest: new_AddrD simp add: raise_system_xcpt_def)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   753
  
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   754
  with exec ins meth new_Addr 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   755
  have state':
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   756
    "state' = Norm (hp(oref\<mapsto>(X, init_vars (fields (G, X)))), 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   757
              (Addr oref # stk, loc, C, sig, Suc pc) # frs)" 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   758
    (is "state' = Norm (?hp', ?f # frs)")
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   759
    by simp    
10920
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   760
  moreover
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   761
  from wf hp heap_ok is_class_X
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   762
  have hp': "G \<turnstile>h ?hp' \<surd>"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   763
    by - (rule hconf_newref, auto simp add: oconf_def dest: fields_is_type)
10920
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   764
  moreover
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   765
  from hp
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   766
  have sup: "hp \<le>| ?hp'" by (rule hext_new)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   767
  from hp frame less suc_pc wf
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   768
  have "correct_frame G ?hp' (ST', LT') maxl ins ?f"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   769
    apply (unfold correct_frame_def sup_state_conv)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   770
    apply (clarsimp simp add: map_eq_Cons conf_def fun_upd_apply approx_val_def)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   771
    apply (blast intro: approx_stk_sup_heap approx_loc_sup_heap sup)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   772
    done      
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   773
  moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   774
  from hp frames wf heap_ok is_class_X
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   775
  have "correct_frames G ?hp' phi rT sig frs"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   776
    by - (rule correct_frames_newref, 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   777
          auto simp add: oconf_def dest: fields_is_type)
10920
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   778
  ultimately
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   779
  show ?thesis
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   780
    by (simp add: is_class_C meth phi_suc correct_state_def del: not_None_eq)
10920
9b74eceea2d2 newref -> new_Addr
kleing
parents: 10897
diff changeset
   781
qed
11085
b830bf10bf71 tuned for 99-2 release
kleing
parents: 10920
diff changeset
   782
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   783
lemmas [simp del] = split_paired_Ex
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   784
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   785
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   786
lemma Invoke_correct: 
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   787
"[| wt_jvm_prog G phi; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   788
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   789
  ins ! pc = Invoke C' mn pTs; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   790
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   791
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   792
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd>;
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   793
  fst (exec_instr (ins!pc) G hp stk loc C sig pc frs) = None |] 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   794
==> G,phi \<turnstile>JVM state'\<surd>" 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   795
proof -
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   796
  assume wtprog: "wt_jvm_prog G phi"
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   797
  assume method: "method (G,C) sig = Some (C,rT,maxs,maxl,ins,et)"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   798
  assume ins:    "ins ! pc = Invoke C' mn pTs"
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   799
  assume wti:    "wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   800
  assume state': "Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs)"
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   801
  assume approx: "G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd>"
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   802
  assume no_xcp: "fst (exec_instr (ins!pc) G hp stk loc C sig pc frs) = None"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   803
  
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   804
  from wtprog 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   805
  obtain wfmb where
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   806
    wfprog: "wf_prog wfmb G" 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   807
    by (simp add: wt_jvm_prog_def)
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   808
      
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   809
  from ins method approx
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   810
  obtain s where
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   811
    heap_ok: "G\<turnstile>h hp\<surd>" and
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   812
    phi_pc:  "phi C sig!pc = Some s" and
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   813
    is_class_C: "is_class G C" and
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   814
    frame:   "correct_frame G hp s maxl ins (stk, loc, C, sig, pc)" and
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   815
    frames:  "correct_frames G hp phi rT sig frs"
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   816
    by (clarsimp simp add: correct_state_def iff del: not_None_eq)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   817
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   818
  from ins wti phi_pc
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   819
  obtain apTs X ST LT D' rT body where 
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   820
    is_class: "is_class G C'" and
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   821
    s:  "s = (rev apTs @ X # ST, LT)" and
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   822
    l:  "length apTs = length pTs" and
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   823
    X:  "G\<turnstile> X \<preceq> Class C'" and
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   824
    w:  "\<forall>x\<in>set (zip apTs pTs). x \<in> widen G" and
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   825
    mC':"method (G, C') (mn, pTs) = Some (D', rT, body)" and
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   826
    pc: "Suc pc < length ins" and
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   827
    eff: "G \<turnstile> norm_eff (Invoke C' mn pTs) G (Some s) <=' phi C sig!Suc pc"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   828
    by (simp add: wt_instr_def eff_def del: not_None_eq) 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   829
       (elim exE conjE, rule that)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   830
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   831
  from eff
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   832
  obtain ST' LT' where
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   833
    s': "phi C sig ! Suc pc = Some (ST', LT')"
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   834
    by (simp add: norm_eff_def split_paired_Ex) blast
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   835
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   836
  from X 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   837
  obtain T where
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   838
    X_Ref: "X = RefT T"
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   839
    by - (drule widen_RefT2, erule exE, rule that)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   840
  
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   841
  from s ins frame 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   842
  obtain 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   843
    a_stk: "approx_stk G hp stk (rev apTs @ X # ST)" and
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   844
    a_loc: "approx_loc G hp loc LT" and
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   845
    suc_l: "length loc = Suc (length (snd sig) + maxl)"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   846
    by (simp add: correct_frame_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   847
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   848
  from a_stk
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   849
  obtain opTs stk' oX where
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   850
    opTs:   "approx_stk G hp opTs (rev apTs)" and
10496
f2d304bdf3cc BCV integration (first step)
kleing
parents: 10387
diff changeset
   851
    oX:     "approx_val G hp oX (OK X)" and
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   852
    a_stk': "approx_stk G hp stk' ST" and
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   853
    stk':   "stk = opTs @ oX # stk'" and
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   854
    l_o:    "length opTs = length apTs" 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   855
            "length stk' = length ST"  
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   856
    by - (drule approx_stk_append, auto)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   857
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   858
  from oX X_Ref
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   859
  have oX_conf: "G,hp \<turnstile> oX ::\<preceq> RefT T"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   860
    by (simp add: approx_val_def)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   861
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   862
  from stk' l_o l
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
   863
  have oX_pos: "last (take (Suc (length pTs)) stk) = oX" by simp
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   864
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   865
  with state' method ins no_xcp oX_conf
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   866
  obtain ref where oX_Addr: "oX = Addr ref"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   867
    by (auto simp add: raise_system_xcpt_def dest: conf_RefTD)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   868
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   869
  with oX_conf X_Ref
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   870
  obtain obj D where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   871
    loc:    "hp ref = Some obj" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   872
    obj_ty: "obj_ty obj = Class D" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   873
    D:      "G \<turnstile> Class D \<preceq> X"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   874
    by (auto simp add: conf_def) blast
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   875
  
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   876
  with X_Ref obtain X' where X': "X = Class X'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   877
    by (blast dest: widen_Class)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   878
      
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   879
  with X have X'_subcls: "G \<turnstile> X' \<preceq>C C'"  by simp
10612
779af7c58743 improved superclass entry for classes and definition status of is_class, class
oheimb
parents: 10592
diff changeset
   880
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   881
  with mC' wfprog
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   882
  obtain D0 rT0 maxs0 maxl0 ins0 et0 where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   883
    mX: "method (G, X') (mn, pTs) = Some (D0, rT0, maxs0, maxl0, ins0, et0)" "G\<turnstile>rT0\<preceq>rT"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   884
    by (auto dest: subtype_widen_methd intro: that)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   885
    
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   886
  from X' D have D_subcls: "G \<turnstile> D \<preceq>C X'" by simp
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   887
  
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   888
  with wfprog mX
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   889
  obtain D'' rT' mxs' mxl' ins' et' where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   890
    mD: "method (G, D) (mn, pTs) = Some (D'', rT', mxs', mxl', ins', et')" 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   891
        "G \<turnstile> rT' \<preceq> rT0"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   892
    by (auto dest: subtype_widen_methd intro: that)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   893
  
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   894
  from mX mD have rT': "G \<turnstile> rT' \<preceq> rT" by - (rule widen_trans)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   895
  
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   896
  from is_class X'_subcls D_subcls
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   897
  have is_class_D: "is_class G D" by (auto dest: subcls_is_class2)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   898
  
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   899
  with mD wfprog
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   900
  obtain mD'': 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   901
    "method (G, D'') (mn, pTs) = Some (D'', rT', mxs', mxl', ins', et')"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   902
    "is_class G D''"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   903
    by (auto dest: method_in_md)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   904
      
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   905
  from loc obj_ty have "fst (the (hp ref)) = D" by (simp add: obj_ty_def)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   906
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   907
  with oX_Addr oX_pos state' method ins stk' l_o l loc obj_ty mD no_xcp
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   908
  have state'_val:
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   909
    "state' =
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   910
     Norm (hp, ([], Addr ref # rev opTs @ replicate mxl' arbitrary, 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   911
                D'', (mn, pTs), 0) # (opTs @ Addr ref # stk', loc, C, sig, pc) # frs)"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   912
    (is "state' = Norm (hp, ?f # ?f' # frs)")
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   913
    by (simp add: raise_system_xcpt_def)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   914
    
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   915
  from wtprog mD''
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   916
  have start: "wt_start G D'' pTs mxl' (phi D'' (mn, pTs)) \<and> ins' \<noteq> []"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   917
    by (auto dest: wt_jvm_prog_impl_wt_start)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   918
    
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   919
  then obtain LT0 where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   920
    LT0: "phi D'' (mn, pTs) ! 0 = Some ([], LT0)"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   921
    by (clarsimp simp add: wt_start_def sup_state_conv)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   922
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   923
  have c_f: "correct_frame G hp ([], LT0) mxl' ins' ?f"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   924
  proof -
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   925
    from start LT0
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   926
    have sup_loc: 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   927
      "G \<turnstile> (OK (Class D'') # map OK pTs @ replicate mxl' Err) <=l LT0"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   928
      (is "G \<turnstile> ?LT <=l LT0")
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   929
      by (simp add: wt_start_def sup_state_conv)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   930
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   931
    have r: "approx_loc G hp (replicate mxl' arbitrary) (replicate mxl' Err)"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   932
      by (simp add: approx_loc_def list_all2_def set_replicate_conv_if)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   933
    
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   934
    from wfprog mD is_class_D
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   935
    have "G \<turnstile> Class D \<preceq> Class D''"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   936
      by (auto dest: method_wf_mdecl)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   937
    with obj_ty loc
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   938
    have a: "approx_val G hp (Addr ref) (OK (Class D''))"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   939
      by (simp add: approx_val_def conf_def)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   940
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   941
    from opTs w l l_o wfprog 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   942
    have "approx_stk G hp opTs (rev pTs)" 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   943
      by (auto elim!: approx_stk_all_widen simp add: zip_rev)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   944
    hence "approx_stk G hp (rev opTs) pTs" by (subst approx_stk_rev)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   945
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   946
    with r a l_o l
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   947
    have "approx_loc G hp (Addr ref # rev opTs @ replicate mxl' arbitrary) ?LT"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   948
      (is "approx_loc G hp ?lt ?LT")
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   949
      by (auto simp add: approx_loc_append approx_stk_def)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   950
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   951
    from this sup_loc wfprog
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   952
    have "approx_loc G hp ?lt LT0" by (rule approx_loc_widen)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   953
    with start l_o l
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   954
    show ?thesis by (simp add: correct_frame_def)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   955
  qed
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   956
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   957
  from state'_val heap_ok mD'' ins method phi_pc s X' l mX
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   958
       frames s' LT0 c_f is_class_C stk' oX_Addr frame 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   959
  show ?thesis by (simp add: correct_state_def) (intro exI conjI, blast)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   960
qed
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   961
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   962
lemmas [simp del] = map_append
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   963
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   964
lemma Return_correct:
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
   965
"[| wt_jvm_prog G phi; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   966
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   967
  ins ! pc = Return; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   968
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
   969
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   970
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |]
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
   971
==> G,phi \<turnstile>JVM state'\<surd>"
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   972
proof -
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   973
  assume wt_prog: "wt_jvm_prog G phi"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   974
  assume meth: "method (G,C) sig = Some (C,rT,maxs,maxl,ins,et)"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   975
  assume ins: "ins ! pc = Return"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   976
  assume wt: "wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   977
  assume s': "Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs)"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   978
  assume correct: "G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd>"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   979
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   980
  from wt_prog 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   981
  obtain wfmb where wf: "wf_prog wfmb G" by (simp add: wt_jvm_prog_def)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   982
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   983
  from meth ins s'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   984
  have "frs = [] \<Longrightarrow> ?thesis" by (simp add: correct_state_def)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   985
  moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   986
  { fix f frs' 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   987
    assume frs': "frs = f#frs'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   988
    moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   989
    obtain stk' loc' C' sig' pc' where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   990
      f: "f = (stk',loc',C',sig',pc')" by (cases f)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   991
    moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   992
    obtain mn pt where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   993
      sig: "sig = (mn,pt)" by (cases sig)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   994
    moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   995
    note meth ins s'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   996
    ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   997
    have state':
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   998
      "state' = (None,hp,(hd stk#(drop (1+length pt) stk'),loc',C',sig',pc'+1)#frs')"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
   999
      (is "state' = (None,hp,?f'#frs')")
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1000
      by simp
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1001
    
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1002
    from correct meth
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1003
    obtain ST LT where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1004
      hp_ok:  "G \<turnstile>h hp \<surd>" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1005
      phi_pc: "phi C sig ! pc = Some (ST, LT)" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1006
      frame:  "correct_frame G hp (ST, LT) maxl ins (stk,loc,C,sig,pc)" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1007
      frames: "correct_frames G hp phi rT sig frs"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1008
      by (simp add: correct_state_def, clarify, blast)    
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1009
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1010
    from phi_pc ins wt
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1011
    obtain T ST' where "ST = T # ST'" "G \<turnstile> T \<preceq> rT"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1012
      by (simp add: wt_instr_def) blast    
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1013
    with wf frame 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1014
    have hd_stk: "G,hp \<turnstile> (hd stk) ::\<preceq> rT"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1015
      by (auto simp add: correct_frame_def elim: conf_widen)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1016
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1017
    from f frs' frames sig
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1018
    obtain apTs ST0' ST' LT' D D' D'' rT' rT'' maxs' maxl' ins' et' body where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1019
      phi':   "phi C' sig' ! pc' = Some (ST',LT')" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1020
      class': "is_class G C'" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1021
      meth':  "method (G,C') sig' = Some (C',rT',maxs',maxl',ins',et')" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1022
      ins':   "ins' ! pc' = Invoke D' mn pt" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1023
      frame': "correct_frame G hp (ST', LT') maxl' ins' f" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1024
      frames':"correct_frames G hp phi rT' sig' frs'" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1025
      rT'':   "G \<turnstile> rT \<preceq> rT''" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1026
      meth'': "method (G, D) sig = Some (D'', rT'', body)" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1027
      ST0':   "ST' = rev apTs @ Class D # ST0'" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1028
      len':   "length apTs = length pt" 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1029
      by clarsimp blast    
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1030
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1031
    from f frame'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1032
    obtain
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1033
      stk': "approx_stk G hp stk' ST'" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1034
      loc': "approx_loc G hp loc' LT'" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1035
      pc':  "pc' < length ins'" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1036
      lloc':"length loc' = Suc (length (snd sig') + maxl')"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1037
      by (simp add: correct_frame_def)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1038
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1039
    from wt_prog class' meth' pc'  
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1040
    have "wt_instr (ins'!pc') G rT' (phi C' sig') maxs' (length ins') et' pc'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1041
      by (rule wt_jvm_prog_impl_wt_instr)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1042
    with ins' phi' sig
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1043
    obtain apTs ST0 X ST'' LT'' body' rT0 mD where
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1044
      phi_suc: "phi C' sig' ! Suc pc' = Some (ST'', LT'')" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1045
      ST0:     "ST' = rev apTs @ X # ST0" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1046
      len:     "length apTs = length pt" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1047
      less:    "G \<turnstile> (rT0 # ST0, LT') <=s (ST'', LT'')" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1048
      methD':  "method (G, D') sig = Some (mD, rT0, body')" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1049
      lessD':  "G \<turnstile> X \<preceq> Class D'" and
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1050
      suc_pc': "Suc pc' < length ins'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1051
      by (clarsimp simp add: wt_instr_def eff_def norm_eff_def) blast
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1052
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1053
    from len len' ST0 ST0'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1054
    have "X = Class D" by simp
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1055
    with lessD'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1056
    have "G \<turnstile> D \<preceq>C D'" by simp
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1057
    moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1058
    note wf meth'' methD'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1059
    ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1060
    have "G \<turnstile> rT'' \<preceq> rT0" by (auto dest: subcls_widen_methd)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1061
    with wf hd_stk rT''
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1062
    have hd_stk': "G,hp \<turnstile> (hd stk) ::\<preceq> rT0" by (auto elim: conf_widen widen_trans)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1063
        
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1064
    have frame'':
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1065
      "correct_frame G hp (ST'',LT'') maxl' ins' ?f'"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1066
    proof -
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1067
      from wf hd_stk' len stk' less ST0
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1068
      have "approx_stk G hp (hd stk # drop (1+length pt) stk') ST''" 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1069
        by (auto simp add: map_eq_Cons sup_state_conv
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1070
                 dest!: approx_stk_append elim: conf_widen)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1071
      moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1072
      from wf loc' less
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1073
      have "approx_loc G hp loc' LT''" by (simp add: sup_state_conv) blast
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1074
      moreover
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1075
      note suc_pc' lloc'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1076
      ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1077
      show ?thesis by (simp add: correct_frame_def)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1078
    qed
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1079
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1080
    with state' frs' f meth hp_ok hd_stk phi_suc frames' meth' phi' class'
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1081
    have ?thesis by (simp add: correct_state_def)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1082
  }
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1083
  ultimately
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1084
  show ?thesis by (cases frs) blast+
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1085
qed
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1086
  
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1087
lemmas [simp] = map_append
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1088
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1089
lemma Goto_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
  1090
"[| wf_prog wt G; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1091
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1092
  ins ! pc = Goto branch; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1093
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1094
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1095
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1096
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1097
apply (clarsimp simp add: defs1)
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
  1098
apply fast
9819
wenzelm
parents: 9757
diff changeset
  1099
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1100
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1101
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1102
lemma Ifcmpeq_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
  1103
"[| wf_prog wt G; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1104
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1105
  ins ! pc = Ifcmpeq branch; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1106
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1107
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1108
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1109
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1110
apply (clarsimp simp add: defs1)
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
  1111
apply fast
9819
wenzelm
parents: 9757
diff changeset
  1112
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1113
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1114
lemma Pop_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
  1115
"[| wf_prog wt G; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1116
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1117
  ins ! pc = Pop;
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1118
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1119
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1120
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1121
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1122
apply (clarsimp simp add: defs1)
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
  1123
apply fast
9819
wenzelm
parents: 9757
diff changeset
  1124
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1125
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1126
lemma Dup_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
  1127
"[| wf_prog wt G; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1128
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1129
  ins ! pc = Dup;
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1130
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1131
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1132
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1133
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1134
apply (clarsimp simp add: defs1 map_eq_Cons)
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
  1135
apply (blast intro: conf_widen)
9819
wenzelm
parents: 9757
diff changeset
  1136
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1137
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1138
lemma Dup_x1_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
  1139
"[| wf_prog wt G; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1140
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1141
  ins ! pc = Dup_x1;
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1142
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1143
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1144
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1145
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1146
apply (clarsimp simp add: defs1 map_eq_Cons)
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
  1147
apply (blast intro: conf_widen)
9819
wenzelm
parents: 9757
diff changeset
  1148
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1149
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1150
lemma Dup_x2_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
  1151
"[| wf_prog wt G; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1152
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1153
  ins ! pc = Dup_x2;
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1154
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1155
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1156
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1157
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1158
apply (clarsimp simp add: defs1 map_eq_Cons)
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
  1159
apply (blast intro: conf_widen)
9819
wenzelm
parents: 9757
diff changeset
  1160
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1161
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1162
lemma Swap_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
  1163
"[| wf_prog wt G; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1164
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1165
  ins ! pc = Swap;
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1166
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1167
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1168
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1169
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1170
apply (clarsimp simp add: defs1 map_eq_Cons)
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
  1171
apply (blast intro: conf_widen)
9819
wenzelm
parents: 9757
diff changeset
  1172
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1173
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1174
lemma IAdd_correct:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
  1175
"[| wf_prog wt G; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1176
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1177
  ins ! pc = IAdd; 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1178
  wt_instr (ins!pc) G rT (phi C sig) maxs (length ins) et pc; 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1179
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1180
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1181
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1182
apply (clarsimp simp add: defs1 map_eq_Cons approx_val_def conf_def)
11252
71c00cb091d2 cleanup, tuned
kleing
parents: 11085
diff changeset
  1183
apply blast
9819
wenzelm
parents: 9757
diff changeset
  1184
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1185
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1186
lemma Throw_correct:
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1187
"[| wf_prog wt G; 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1188
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et); 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1189
  ins ! pc = Throw; 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1190
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs) ; 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1191
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd>;
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1192
  fst (exec_instr (ins!pc) G hp stk loc C sig pc frs) = None |] 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1193
==> G,phi \<turnstile>JVM state'\<surd>"
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1194
  by simp
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1195
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1196
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1197
text {*
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1198
  The next theorem collects the results of the sections above,
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1199
  i.e.~exception handling and the execution step for each 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1200
  instruction. It states type safety for single step execution:
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1201
  in welltyped programs, a conforming state is transformed
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1202
  into another conforming state when one instruction is executed.
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1203
*}
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1204
theorem instr_correct:
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1205
"[| wt_jvm_prog G phi;
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1206
  method (G,C) sig = Some (C,rT,maxs,maxl,ins,et);
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1207
  Some state' = exec (G, None, hp, (stk,loc,C,sig,pc)#frs); 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1208
  G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> |] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1209
==> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1210
apply (frule wt_jvm_prog_impl_wt_instr_cor)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1211
apply assumption+
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1212
apply (cases "fst (exec_instr (ins!pc) G hp stk loc C sig pc frs)")
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1213
defer
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1214
apply (erule xcpt_correct, assumption+) 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1215
apply (cases "ins!pc")
10897
697fab84709e removed instructions Aconst_null+Bipush, introduced LitPush
kleing
parents: 10812
diff changeset
  1216
prefer 8
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1217
apply (rule Invoke_correct, assumption+)
10897
697fab84709e removed instructions Aconst_null+Bipush, introduced LitPush
kleing
parents: 10812
diff changeset
  1218
prefer 8
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1219
apply (rule Return_correct, assumption+)
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1220
prefer 5
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1221
apply (rule Getfield_correct, assumption+)
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1222
prefer 6
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1223
apply (rule Checkcast_correct, assumption+)
10612
779af7c58743 improved superclass entry for classes and definition status of is_class, class
oheimb
parents: 10592
diff changeset
  1224
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1225
apply (unfold wt_jvm_prog_def)
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1226
apply (rule Load_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1227
apply (rule Store_correct, assumption+)
10897
697fab84709e removed instructions Aconst_null+Bipush, introduced LitPush
kleing
parents: 10812
diff changeset
  1228
apply (rule LitPush_correct, assumption+)
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1229
apply (rule New_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1230
apply (rule Putfield_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1231
apply (rule Pop_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1232
apply (rule Dup_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1233
apply (rule Dup_x1_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1234
apply (rule Dup_x2_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1235
apply (rule Swap_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1236
apply (rule IAdd_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1237
apply (rule Goto_correct, assumption+)
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1238
apply (rule Ifcmpeq_correct, assumption+)
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1239
apply (rule Throw_correct, assumption+)
9819
wenzelm
parents: 9757
diff changeset
  1240
done
10626
46bcddfe9e7b update for changes in Correct.thy and class/is_class defs
kleing
parents: 10612
diff changeset
  1241
11085
b830bf10bf71 tuned for 99-2 release
kleing
parents: 10920
diff changeset
  1242
section {* Main *}
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1243
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1244
lemma correct_state_impl_Some_method:
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1245
  "G,phi \<turnstile>JVM (None, hp, (stk,loc,C,sig,pc)#frs)\<surd> 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1246
  ==> \<exists>meth. method (G,C) sig = Some(C,meth)"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1247
by (auto simp add: correct_state_def Let_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1248
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1249
9941
fe05af7ec816 renamed atts: rulify to rule_format, elimify to elim_format;
wenzelm
parents: 9906
diff changeset
  1250
lemma BV_correct_1 [rule_format]:
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1251
"!!state. [| wt_jvm_prog G phi; G,phi \<turnstile>JVM state\<surd>|] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1252
 ==> exec (G,state) = Some state' --> G,phi \<turnstile>JVM state'\<surd>"
9819
wenzelm
parents: 9757
diff changeset
  1253
apply (simp only: split_tupled_all)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1254
apply (rename_tac xp hp frs)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1255
apply (case_tac xp)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1256
 apply (case_tac frs)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1257
  apply simp
9819
wenzelm
parents: 9757
diff changeset
  1258
 apply (simp only: split_tupled_all)
wenzelm
parents: 9757
diff changeset
  1259
 apply hypsubst
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1260
 apply (frule correct_state_impl_Some_method)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1261
 apply (force intro: instr_correct)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1262
apply (case_tac frs)
9819
wenzelm
parents: 9757
diff changeset
  1263
apply simp_all
wenzelm
parents: 9757
diff changeset
  1264
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1265
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1266
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1267
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1268
lemma L0:
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1269
  "[| xp=None; frs\<noteq>[] |] ==> (\<exists>state'. exec (G,xp,hp,frs) = Some state')"
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1270
by (clarsimp simp add: neq_Nil_conv split_beta)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1271
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1272
lemma L1:
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1273
  "[|wt_jvm_prog G phi; G,phi \<turnstile>JVM (xp,hp,frs)\<surd>; xp=None; frs\<noteq>[]|] 
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1274
  ==> \<exists>state'. exec(G,xp,hp,frs) = Some state' \<and> G,phi \<turnstile>JVM state'\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1275
apply (drule L0)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1276
apply assumption
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1277
apply (fast intro: BV_correct_1)
9819
wenzelm
parents: 9757
diff changeset
  1278
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1279
9941
fe05af7ec816 renamed atts: rulify to rule_format, elimify to elim_format;
wenzelm
parents: 9906
diff changeset
  1280
theorem BV_correct [rule_format]:
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1281
"[| wt_jvm_prog G phi; G \<turnstile> s -jvm-> t |] ==> G,phi \<turnstile>JVM s\<surd> --> G,phi \<turnstile>JVM t\<surd>"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1282
apply (unfold exec_all_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1283
apply (erule rtrancl_induct)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1284
 apply simp
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1285
apply (auto intro: BV_correct_1)
9819
wenzelm
parents: 9757
diff changeset
  1286
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1287
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1288
theorem BV_correct_initial:
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
  1289
"[| wt_jvm_prog G phi; 
10812
ead84e90bfeb merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
kleing
parents: 10763
diff changeset
  1290
    G \<turnstile> s0 -jvm-> (None,hp,(stk,loc,C,sig,pc)#frs); G,phi \<turnstile>JVM s0 \<surd>|] 
12516
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1291
==> approx_stk G hp stk (fst (the (phi C sig ! pc))) \<and> 
d09d0f160888 exceptions
kleing
parents: 12389
diff changeset
  1292
    approx_loc G hp loc (snd (the (phi C sig ! pc)))"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1293
apply (drule BV_correct)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1294
apply assumption+
10056
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
  1295
apply (simp add: correct_state_def correct_frame_def split_def 
9f84ffa4a8d0 tuned spacing for document generation
kleing
parents: 10042
diff changeset
  1296
            split: option.splits)
9819
wenzelm
parents: 9757
diff changeset
  1297
done
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1298
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 8011
diff changeset
  1299
end