author | wenzelm |
Sat, 01 Dec 2001 18:52:32 +0100 | |
changeset 12338 | de0f4a63baa5 |
parent 11703 | 6e5de8d4290a |
child 17309 | c43ed29bd197 |
permissions | -rw-r--r-- |
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(* |
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File: Memory.thy |
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Author: Stephan Merz |
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Copyright: 1997 University of Munich |
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Theory Name: Memory |
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Logic Image: TLA |
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RPC-Memory example: Memory specification |
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*) |
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Memory = MemoryParameters + ProcedureInterface + |
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types |
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memChType = "(memOp, Vals) channel" |
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memType = "(Locs => Vals) stfun" (* intention: MemLocs => MemVals *) |
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resType = "(PrIds => Vals) stfun" |
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consts |
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(* state predicates *) |
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MInit :: "memType => Locs => stpred" |
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PInit :: "resType => PrIds => stpred" |
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(* auxiliary predicates: is there a pending read/write request for |
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some process id and location/value? *) |
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RdRequest :: "memChType => PrIds => Locs => stpred" |
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WrRequest :: "memChType => PrIds => Locs => Vals => stpred" |
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(* actions *) |
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GoodRead :: "memType => resType => PrIds => Locs => action" |
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BadRead :: "memType => resType => PrIds => Locs => action" |
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ReadInner :: "memChType => memType => resType => PrIds => Locs => action" |
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Read :: "memChType => memType => resType => PrIds => action" |
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GoodWrite :: "memType => resType => PrIds => Locs => Vals => action" |
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BadWrite :: "memType => resType => PrIds => Locs => Vals => action" |
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WriteInner :: "memChType => memType => resType => PrIds => Locs => Vals => action" |
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Write :: "memChType => memType => resType => PrIds => Locs => action" |
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MemReturn :: "memChType => resType => PrIds => action" |
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MemFail :: "memChType => resType => PrIds => action" |
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RNext :: "memChType => memType => resType => PrIds => action" |
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UNext :: "memChType => memType => resType => PrIds => action" |
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(* temporal formulas *) |
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RPSpec :: "memChType => memType => resType => PrIds => temporal" |
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UPSpec :: "memChType => memType => resType => PrIds => temporal" |
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MSpec :: "memChType => memType => resType => Locs => temporal" |
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IRSpec :: "memChType => memType => resType => temporal" |
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IUSpec :: "memChType => memType => resType => temporal" |
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RSpec :: "memChType => resType => temporal" |
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USpec :: "memChType => temporal" |
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(* memory invariant: in the paper, the invariant is hidden in the definition of |
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the predicate S used in the implementation proof, but it is easier to verify |
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at this level. *) |
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MemInv :: "memType => Locs => stpred" |
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rules |
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MInit_def "MInit mm l == PRED mm!l = #InitVal" |
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PInit_def "PInit rs p == PRED rs!p = #NotAResult" |
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RdRequest_def "RdRequest ch p l == PRED |
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Calling ch p & (arg<ch!p> = #(read l))" |
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WrRequest_def "WrRequest ch p l v == PRED |
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Calling ch p & (arg<ch!p> = #(write l v))" |
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(* a read that doesn't raise BadArg *) |
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GoodRead_def "GoodRead mm rs p l == ACT |
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#l : #MemLoc & ((rs!p)$ = $(mm!l))" |
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(* a read that raises BadArg *) |
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BadRead_def "BadRead mm rs p l == ACT |
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#l ~: #MemLoc & ((rs!p)$ = #BadArg)" |
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(* the read action with l visible *) |
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ReadInner_def "ReadInner ch mm rs p l == ACT |
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$(RdRequest ch p l) |
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& (GoodRead mm rs p l | BadRead mm rs p l) |
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& unchanged (rtrner ch ! p)" |
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(* the read action with l quantified *) |
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Read_def "Read ch mm rs p == ACT (EX l. ReadInner ch mm rs p l)" |
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(* similar definitions for the write action *) |
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GoodWrite_def "GoodWrite mm rs p l v == ACT |
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#l : #MemLoc & #v : #MemVal |
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& ((mm!l)$ = #v) & ((rs!p)$ = #OK)" |
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BadWrite_def "BadWrite mm rs p l v == ACT |
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~ (#l : #MemLoc & #v : #MemVal) |
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& ((rs!p)$ = #BadArg) & unchanged (mm!l)" |
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WriteInner_def "WriteInner ch mm rs p l v == ACT |
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$(WrRequest ch p l v) |
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& (GoodWrite mm rs p l v | BadWrite mm rs p l v) |
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& unchanged (rtrner ch ! p)" |
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wenzelm
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Write_def "Write ch mm rs p l == ACT (EX v. WriteInner ch mm rs p l v)" |
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(* the return action *) |
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MemReturn_def "MemReturn ch rs p == ACT |
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( ($(rs!p) ~= #NotAResult) |
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& ((rs!p)$ = #NotAResult) |
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& Return ch p (rs!p))" |
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(* the failure action of the unreliable memory *) |
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MemFail_def "MemFail ch rs p == ACT |
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$(Calling ch p) |
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& ((rs!p)$ = #MemFailure) |
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& unchanged (rtrner ch ! p)" |
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(* next-state relations for reliable / unreliable memory *) |
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RNext_def "RNext ch mm rs p == ACT |
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( Read ch mm rs p |
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f58863b1406a
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wenzelm
parents:
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diff
changeset
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| (EX l. Write ch mm rs p l) |
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| MemReturn ch rs p)" |
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UNext_def "UNext ch mm rs p == ACT |
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(RNext ch mm rs p | MemFail ch rs p)" |
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RPSpec_def "RPSpec ch mm rs p == TEMP |
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Init(PInit rs p) |
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& [][ RNext ch mm rs p ]_(rtrner ch ! p, rs!p) |
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& WF(RNext ch mm rs p)_(rtrner ch ! p, rs!p) |
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& WF(MemReturn ch rs p)_(rtrner ch ! p, rs!p)" |
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UPSpec_def "UPSpec ch mm rs p == TEMP |
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Init(PInit rs p) |
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& [][ UNext ch mm rs p ]_(rtrner ch ! p, rs!p) |
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& WF(RNext ch mm rs p)_(rtrner ch ! p, rs!p) |
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& WF(MemReturn ch rs p)_(rtrner ch ! p, rs!p)" |
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MSpec_def "MSpec ch mm rs l == TEMP |
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Init(MInit mm l) |
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wenzelm
parents:
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changeset
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& [][ EX p. Write ch mm rs p l ]_(mm!l)" |
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IRSpec_def "IRSpec ch mm rs == TEMP |
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wenzelm
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(ALL p. RPSpec ch mm rs p) |
f58863b1406a
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wenzelm
parents:
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& (ALL l. #l : #MemLoc --> MSpec ch mm rs l)" |
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IUSpec_def "IUSpec ch mm rs == TEMP |
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wenzelm
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changeset
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(ALL p. UPSpec ch mm rs p) |
f58863b1406a
tuned version by Stephan Merz (unbatchified etc.);
wenzelm
parents:
6255
diff
changeset
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& (ALL l. #l : #MemLoc --> MSpec ch mm rs l)" |
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RSpec_def "RSpec ch rs == TEMP (EEX mm. IRSpec ch mm rs)" |
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USpec_def "USpec ch == TEMP (EEX mm rs. IUSpec ch mm rs)" |
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MemInv_def "MemInv mm l == PRED #l : #MemLoc --> mm!l : #MemVal" |
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end |