src/HOL/MicroJava/BV/LBVComplete.thy
author kleing
Sun, 07 Jan 2001 18:43:13 +0100
changeset 10812 ead84e90bfeb
parent 10628 4ea7f3e8e471
child 11085 b830bf10bf71
permissions -rw-r--r--
merged semilattice orders with <=' from Convert.thy (now defined in JVMType.thy)
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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(*  Title:      HOL/MicroJava/BV/LBVComplete.thy
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    ID:         $Id$
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    Author:     Gerwin Klein
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    Copyright   2000 Technische Universitaet Muenchen
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*)
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header {* Completeness of the LBV *}
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theory LBVComplete = BVSpec + LBVSpec + StepMono:
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constdefs
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  contains_targets :: "[instr list, certificate, method_type, p_count] => bool"
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  "contains_targets ins cert phi pc == 
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     \<forall>pc' \<in> set (succs (ins!pc) pc). 
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      pc' \<noteq> pc+1 \<and> pc' < length ins --> cert!pc' = phi!pc'"
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  fits :: "[instr list, certificate, method_type] => bool"
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  "fits ins cert phi == \<forall>pc. pc < length ins --> 
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                       contains_targets ins cert phi pc \<and>
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                       (cert!pc = None \<or> cert!pc = phi!pc)"
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  is_target :: "[instr list, p_count] => bool" 
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  "is_target ins pc == 
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     \<exists>pc'. pc \<noteq> pc'+1 \<and> pc' < length ins \<and> pc \<in> set (succs (ins!pc') pc')"
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constdefs 
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  make_cert :: "[instr list, method_type] => certificate"
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  "make_cert ins phi == 
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     map (\<lambda>pc. if is_target ins pc then phi!pc else None) [0..length ins(]"
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  make_Cert :: "[jvm_prog, prog_type] => prog_certificate"
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  "make_Cert G Phi ==  \<lambda> C sig. let (C,rT,(maxs,maxl,b)) = the (method (G,C) sig)
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                                in make_cert b (Phi C sig)"
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lemmas [simp del] = split_paired_Ex
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lemma make_cert_target:
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  "[| pc < length ins; is_target ins pc |] ==> make_cert ins phi ! pc = phi!pc"
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  by (simp add: make_cert_def)
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lemma make_cert_approx:
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  "[| pc < length ins; make_cert ins phi ! pc \<noteq> phi ! pc |] ==> 
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   make_cert ins phi ! pc = None"
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  by (auto simp add: make_cert_def)
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lemma make_cert_contains_targets:
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  "pc < length ins ==> contains_targets ins (make_cert ins phi) phi pc"
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proof (unfold contains_targets_def, intro strip, elim conjE)
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  fix pc'
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  assume "pc < length ins" 
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         "pc' \<in> set (succs (ins ! pc) pc)" 
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         "pc' \<noteq> pc+1" and
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    pc': "pc' < length ins"
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  hence "is_target ins pc'" 
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    by (auto simp add: is_target_def)
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  with pc'
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  show "make_cert ins phi ! pc' = phi ! pc'" 
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    by (auto intro: make_cert_target)
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qed
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theorem fits_make_cert:
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  "fits ins (make_cert ins phi) phi"
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  by (auto dest: make_cert_approx simp add: fits_def make_cert_contains_targets)
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lemma fitsD: 
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  "[| fits ins cert phi; pc' \<in> set (succs (ins!pc) pc); 
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      pc' \<noteq> Suc pc; pc < length ins; pc' < length ins |]
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  ==> cert!pc' = phi!pc'"
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  by (clarsimp simp add: fits_def contains_targets_def)
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lemma fitsD2:
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   "[| fits ins cert phi; pc < length ins; cert!pc = Some s |]
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  ==> cert!pc = phi!pc"
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  by (auto simp add: fits_def)
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lemma wtl_inst_mono:
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  "[| wtl_inst i G rT s1 cert mxs mpc pc = OK s1'; fits ins cert phi; 
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      pc < length ins;  G \<turnstile> s2 <=' s1; i = ins!pc |] ==>
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  \<exists> s2'. wtl_inst (ins!pc) G rT s2 cert mxs mpc pc = OK s2' \<and> (G \<turnstile> s2' <=' s1')"
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proof -
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  assume pc:   "pc < length ins" "i = ins!pc"
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  assume wtl:  "wtl_inst i G rT s1 cert mxs mpc pc = OK s1'"
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  assume fits: "fits ins cert phi"
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  assume G:    "G \<turnstile> s2 <=' s1"
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  let "?step s" = "step i G s"
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  from wtl G
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  have app: "app i G mxs rT s2" by (auto simp add: wtl_inst_OK app_mono)
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  from wtl G
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  have step: "G \<turnstile> ?step s2 <=' ?step s1" 
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    by (auto intro: step_mono simp add: wtl_inst_OK)
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  { also
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    fix pc'
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    assume "pc' \<in> set (succs i pc)" "pc' \<noteq> pc+1"
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    with wtl 
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    have "G \<turnstile> ?step s1 <=' cert!pc'"
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      by (auto simp add: wtl_inst_OK) 
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    finally
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    have "G\<turnstile> ?step s2 <=' cert!pc'" .
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  } note cert = this
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  have "\<exists>s2'. wtl_inst i G rT s2 cert mxs mpc pc = OK s2' \<and> G \<turnstile> s2' <=' s1'"
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  proof (cases "pc+1 \<in> set (succs i pc)")
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    case True
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    with wtl
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    have s1': "s1' = ?step s1" by (simp add: wtl_inst_OK)
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    have "wtl_inst i G rT s2 cert mxs mpc pc = OK (?step s2) \<and> G \<turnstile> ?step s2 <=' s1'" 
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      (is "?wtl \<and> ?G")
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    proof
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      from True s1'
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      show ?G by (auto intro: step)
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      from True app wtl
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      show ?wtl
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        by (clarsimp intro!: cert simp add: wtl_inst_OK)
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    qed
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    thus ?thesis by blast
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  next
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    case False
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    with wtl
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    have "s1' = cert ! Suc pc" by (simp add: wtl_inst_OK)
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    with False app wtl
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    have "wtl_inst i G rT s2 cert mxs mpc pc = OK s1' \<and> G \<turnstile> s1' <=' s1'"
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      by (clarsimp intro!: cert simp add: wtl_inst_OK)
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    thus ?thesis by blast
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  qed
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  with pc show ?thesis by simp
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qed
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   143
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lemma wtl_cert_mono:
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  "[| wtl_cert i G rT s1 cert mxs mpc pc = OK s1'; fits ins cert phi; 
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      pc < length ins; G \<turnstile> s2 <=' s1; i = ins!pc |] ==>
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   148
  \<exists> s2'. wtl_cert (ins!pc) G rT s2 cert mxs mpc pc = OK s2' \<and> (G \<turnstile> s2' <=' s1')"
9559
kleing
parents: 9549
diff changeset
   149
proof -
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   150
  assume wtl:  "wtl_cert i G rT s1 cert mxs mpc pc = OK s1'" and
9559
kleing
parents: 9549
diff changeset
   151
         fits: "fits ins cert phi" "pc < length ins"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   152
               "G \<turnstile> s2 <=' s1" "i = ins!pc"
9559
kleing
parents: 9549
diff changeset
   153
kleing
parents: 9549
diff changeset
   154
  show ?thesis
9664
4cae97480a6d open cases;
wenzelm
parents: 9594
diff changeset
   155
  proof (cases (open) "cert!pc")
9559
kleing
parents: 9549
diff changeset
   156
    case None
9580
kleing
parents: 9559
diff changeset
   157
    with wtl fits
kleing
parents: 9559
diff changeset
   158
    show ?thesis 
9941
fe05af7ec816 renamed atts: rulify to rule_format, elimify to elim_format;
wenzelm
parents: 9906
diff changeset
   159
      by - (rule wtl_inst_mono [elim_format], (simp add: wtl_cert_def)+)
9559
kleing
parents: 9549
diff changeset
   160
  next
kleing
parents: 9549
diff changeset
   161
    case Some
9580
kleing
parents: 9559
diff changeset
   162
    with wtl fits
9559
kleing
parents: 9549
diff changeset
   163
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   164
    have G: "G \<turnstile> s2 <=' (Some a)"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   165
      by - (rule sup_state_opt_trans, auto simp add: wtl_cert_def split: if_splits)
9559
kleing
parents: 9549
diff changeset
   166
kleing
parents: 9549
diff changeset
   167
    from Some wtl
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   168
    have "wtl_inst i G rT (Some a) cert mxs mpc pc = OK s1'" 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   169
      by (simp add: wtl_cert_def split: if_splits)
9559
kleing
parents: 9549
diff changeset
   170
kleing
parents: 9549
diff changeset
   171
    with G fits
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   172
    have "\<exists> s2'. wtl_inst (ins!pc) G rT (Some a) cert mxs mpc pc = OK s2' \<and> 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   173
                 (G \<turnstile> s2' <=' s1')"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   174
      by - (rule wtl_inst_mono, (simp add: wtl_cert_def)+)
9559
kleing
parents: 9549
diff changeset
   175
    
9580
kleing
parents: 9559
diff changeset
   176
    with Some G
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   177
    show ?thesis by (simp add: wtl_cert_def)
9559
kleing
parents: 9549
diff changeset
   178
  qed
kleing
parents: 9549
diff changeset
   179
qed
kleing
parents: 9549
diff changeset
   180
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   181
 
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   182
lemma wt_instr_imp_wtl_inst:
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   183
  "[| wt_instr (ins!pc) G rT phi mxs max_pc pc; fits ins cert phi;
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   184
      pc < length ins; length ins = max_pc |] ==> 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   185
  wtl_inst (ins!pc) G rT (phi!pc) cert mxs max_pc pc \<noteq> Err"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   186
 proof -
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   187
  assume wt:   "wt_instr (ins!pc) G rT phi mxs max_pc pc" 
9549
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   188
  assume fits: "fits ins cert phi"
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   189
  assume pc:   "pc < length ins" "length ins = max_pc"
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   190
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   191
  from wt 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   192
  have app: "app (ins!pc) G mxs rT (phi!pc)" by (simp add: wt_instr_def)
9549
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   193
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   194
  from wt pc
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   195
  have pc': "!!pc'. pc' \<in> set (succs (ins!pc) pc) ==> pc' < length ins"
9549
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   196
    by (simp add: wt_instr_def)
9376
c32c5696ec2a flat instruction set
kleing
parents: 9260
diff changeset
   197
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   198
  let ?s' = "step (ins!pc) G (phi!pc)"
9549
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   199
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   200
  from wt fits pc
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   201
  have cert: "!!pc'. [|pc' \<in> set (succs (ins!pc) pc); pc' < max_pc; pc' \<noteq> pc+1|] 
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   202
    ==> G \<turnstile> ?s' <=' cert!pc'"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   203
    by (auto dest: fitsD simp add: wt_instr_def)     
9549
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   204
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   205
  from app pc cert pc'
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   206
  show ?thesis
10496
f2d304bdf3cc BCV integration (first step)
kleing
parents: 10042
diff changeset
   207
    by (auto simp add: wtl_inst_OK)
9376
c32c5696ec2a flat instruction set
kleing
parents: 9260
diff changeset
   208
qed
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   209
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   210
lemma wt_less_wtl:
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   211
  "[| wt_instr (ins!pc) G rT phi mxs max_pc pc; 
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   212
      wtl_inst (ins!pc) G rT (phi!pc) cert mxs max_pc pc = OK s;
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   213
      fits ins cert phi; Suc pc < length ins; length ins = max_pc |] ==> 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   214
  G \<turnstile> s <=' phi ! Suc pc"
9376
c32c5696ec2a flat instruction set
kleing
parents: 9260
diff changeset
   215
proof -
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   216
  assume wt:   "wt_instr (ins!pc) G rT phi mxs max_pc pc" 
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   217
  assume wtl:  "wtl_inst (ins!pc) G rT (phi!pc) cert mxs max_pc pc = OK s"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   218
  assume fits: "fits ins cert phi"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   219
  assume pc:   "Suc pc < length ins" "length ins = max_pc"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   220
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   221
  { assume suc: "Suc pc \<in> set (succs (ins ! pc) pc)"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   222
    with wtl         have "s = step (ins!pc) G (phi!pc)"
10496
f2d304bdf3cc BCV integration (first step)
kleing
parents: 10042
diff changeset
   223
      by (simp add: wtl_inst_OK)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   224
    also from suc wt have "G \<turnstile> ... <=' phi!Suc pc"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   225
      by (simp add: wt_instr_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   226
    finally have ?thesis .
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   227
  }
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   228
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   229
  moreover
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   230
  { assume "Suc pc \<notin> set (succs (ins ! pc) pc)"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   231
    
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   232
    with wtl
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   233
    have "s = cert!Suc pc" 
10496
f2d304bdf3cc BCV integration (first step)
kleing
parents: 10042
diff changeset
   234
      by (simp add: wtl_inst_OK)
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   235
    with fits pc
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   236
    have ?thesis
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   237
      by - (cases "cert!Suc pc", simp, drule fitsD2, assumption+, simp)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   238
  }
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   239
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   240
  ultimately
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   241
  show ?thesis by blast
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   242
qed
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   243
  
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   244
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   245
lemma wt_instr_imp_wtl_cert:
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   246
  "[| wt_instr (ins!pc) G rT phi mxs max_pc pc; fits ins cert phi;
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   247
      pc < length ins; length ins = max_pc |] ==> 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   248
  wtl_cert (ins!pc) G rT (phi!pc) cert mxs max_pc pc \<noteq> Err"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   249
proof -
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   250
  assume "wt_instr (ins!pc) G rT phi mxs max_pc pc" and 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   251
   fits: "fits ins cert phi" and
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   252
     pc: "pc < length ins" and
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   253
         "length ins = max_pc"
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   254
  
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   255
  hence wtl: "wtl_inst (ins!pc) G rT (phi!pc) cert mxs max_pc pc \<noteq> Err"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   256
    by (rule wt_instr_imp_wtl_inst)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   257
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   258
  hence "cert!pc = None ==> ?thesis"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   259
    by (simp add: wtl_cert_def)
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   260
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   261
  moreover
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   262
  { fix s
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   263
    assume c: "cert!pc = Some s"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   264
    with fits pc
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   265
    have "cert!pc = phi!pc"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   266
      by (rule fitsD2)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   267
    from this c wtl
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   268
    have ?thesis
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   269
      by (clarsimp simp add: wtl_cert_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   270
  }
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   271
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   272
  ultimately
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   273
  show ?thesis by blast
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   274
qed
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   275
  
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   276
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   277
lemma wt_less_wtl_cert:
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   278
  "[| wt_instr (ins!pc) G rT phi mxs max_pc pc; 
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   279
      wtl_cert (ins!pc) G rT (phi!pc) cert mxs max_pc pc = OK s;
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   280
      fits ins cert phi; Suc pc < length ins; length ins = max_pc |] ==> 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   281
  G \<turnstile> s <=' phi ! Suc pc"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   282
proof -
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   283
  assume wtl: "wtl_cert (ins!pc) G rT (phi!pc) cert mxs max_pc pc = OK s"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   284
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   285
  assume wti: "wt_instr (ins!pc) G rT phi mxs max_pc pc"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   286
              "fits ins cert phi" 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   287
              "Suc pc < length ins" "length ins = max_pc"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   288
  
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   289
  { assume "cert!pc = None"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   290
    with wtl
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   291
    have "wtl_inst (ins!pc) G rT (phi!pc) cert mxs max_pc pc = OK s"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   292
      by (simp add: wtl_cert_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   293
    with wti
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   294
    have ?thesis
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   295
      by - (rule wt_less_wtl)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   296
  }
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   297
  moreover
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   298
  { fix t
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   299
    assume c: "cert!pc = Some t"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   300
    with wti
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   301
    have "cert!pc = phi!pc"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   302
      by - (rule fitsD2, simp+)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   303
    with c wtl
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   304
    have "wtl_inst (ins!pc) G rT (phi!pc) cert mxs max_pc pc = OK s"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   305
      by (simp add: wtl_cert_def)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   306
    with wti
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   307
    have ?thesis
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   308
      by - (rule wt_less_wtl)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   309
  }   
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   310
    
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   311
  ultimately
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   312
  show ?thesis by blast
9549
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   313
qed
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   314
9376
c32c5696ec2a flat instruction set
kleing
parents: 9260
diff changeset
   315
9559
kleing
parents: 9549
diff changeset
   316
text {*
kleing
parents: 9549
diff changeset
   317
  \medskip
kleing
parents: 9549
diff changeset
   318
  Main induction over the instruction list.
kleing
parents: 9549
diff changeset
   319
*}
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   320
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   321
theorem wt_imp_wtl_inst_list:
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   322
"\<forall> pc. (\<forall>pc'. pc' < length all_ins --> 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   323
        wt_instr (all_ins ! pc') G rT phi mxs (length all_ins) pc') -->
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   324
       fits all_ins cert phi --> 
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   325
       (\<exists>l. pc = length l \<and> all_ins = l@ins) -->  
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   326
       pc < length all_ins -->      
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   327
       (\<forall> s. (G \<turnstile> s <=' (phi!pc)) --> 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   328
             wtl_inst_list ins G rT cert mxs (length all_ins) pc s \<noteq> Err)" 
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   329
(is "\<forall>pc. ?wt --> ?fits --> ?l pc ins --> ?len pc --> ?wtl pc ins"  
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   330
 is "\<forall>pc. ?C pc ins" is "?P ins") 
9559
kleing
parents: 9549
diff changeset
   331
proof (induct "?P" "ins")
kleing
parents: 9549
diff changeset
   332
  case Nil
kleing
parents: 9549
diff changeset
   333
  show "?P []" by simp
kleing
parents: 9549
diff changeset
   334
next
kleing
parents: 9549
diff changeset
   335
  fix i ins'
kleing
parents: 9549
diff changeset
   336
  assume Cons: "?P ins'"
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   337
9559
kleing
parents: 9549
diff changeset
   338
  show "?P (i#ins')" 
kleing
parents: 9549
diff changeset
   339
  proof (intro allI impI, elim exE conjE)
kleing
parents: 9549
diff changeset
   340
    fix pc s l
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   341
    assume wt  : "\<forall>pc'. pc' < length all_ins --> 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   342
                        wt_instr (all_ins ! pc') G rT phi mxs (length all_ins) pc'"
9559
kleing
parents: 9549
diff changeset
   343
    assume fits: "fits all_ins cert phi"
kleing
parents: 9549
diff changeset
   344
    assume l   : "pc < length all_ins"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   345
    assume G   : "G \<turnstile> s <=' phi ! pc"
9559
kleing
parents: 9549
diff changeset
   346
    assume pc  : "all_ins = l@i#ins'" "pc = length l"
kleing
parents: 9549
diff changeset
   347
    hence  i   : "all_ins ! pc = i"
kleing
parents: 9549
diff changeset
   348
      by (simp add: nth_append)
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   349
9559
kleing
parents: 9549
diff changeset
   350
    from l wt
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   351
    have wti: "wt_instr (all_ins!pc) G rT phi mxs (length all_ins) pc" by blast
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   352
9559
kleing
parents: 9549
diff changeset
   353
    with fits l 
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   354
    have c: "wtl_cert (all_ins!pc) G rT (phi!pc) cert mxs (length all_ins) pc \<noteq> Err"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   355
      by - (drule wt_instr_imp_wtl_cert, auto)
9559
kleing
parents: 9549
diff changeset
   356
    
kleing
parents: 9549
diff changeset
   357
    from Cons
kleing
parents: 9549
diff changeset
   358
    have "?C (Suc pc) ins'" by blast
kleing
parents: 9549
diff changeset
   359
    with wt fits pc
10042
7164dc0d24d8 unsymbolized
kleing
parents: 9941
diff changeset
   360
    have IH: "?len (Suc pc) --> ?wtl (Suc pc) ins'" by auto
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   361
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   362
    show "wtl_inst_list (i#ins') G rT cert mxs (length all_ins) pc s \<noteq> Err" 
9559
kleing
parents: 9549
diff changeset
   363
    proof (cases "?len (Suc pc)")
kleing
parents: 9549
diff changeset
   364
      case False
kleing
parents: 9549
diff changeset
   365
      with pc
kleing
parents: 9549
diff changeset
   366
      have "ins' = []" by simp
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   367
      with G i c fits l
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   368
      show ?thesis by (auto dest: wtl_cert_mono)
9559
kleing
parents: 9549
diff changeset
   369
    next
kleing
parents: 9549
diff changeset
   370
      case True
kleing
parents: 9549
diff changeset
   371
      with IH
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   372
      have wtl: "?wtl (Suc pc) ins'" by blast
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   373
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   374
      from c wti fits l True
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   375
      obtain s'' where
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   376
        "wtl_cert (all_ins!pc) G rT (phi!pc) cert mxs (length all_ins) pc = OK s''"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   377
        "G \<turnstile> s'' <=' phi ! Suc pc"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   378
        by clarsimp (drule wt_less_wtl_cert, auto)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   379
      moreover
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   380
      from calculation fits G l
9559
kleing
parents: 9549
diff changeset
   381
      obtain s' where
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   382
        c': "wtl_cert (all_ins!pc) G rT s cert mxs (length all_ins) pc = OK s'" and
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   383
        "G \<turnstile> s' <=' s''"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   384
        by - (drule wtl_cert_mono, auto)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   385
      ultimately
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   386
      have G': "G \<turnstile> s' <=' phi ! Suc pc" 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   387
        by - (rule sup_state_opt_trans)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   388
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   389
      with wtl
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   390
      have "wtl_inst_list ins' G rT cert mxs (length all_ins) (Suc pc) s' \<noteq> Err"
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   391
        by auto
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   392
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   393
      with i c'
9559
kleing
parents: 9549
diff changeset
   394
      show ?thesis by auto
9549
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   395
    qed
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   396
  qed
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   397
qed
9559
kleing
parents: 9549
diff changeset
   398
  
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   399
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   400
lemma fits_imp_wtl_method_complete:
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   401
  "[| wt_method G C pTs rT mxs mxl ins phi; fits ins cert phi |] 
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   402
  ==> wtl_method G C pTs rT mxs mxl ins cert"
9594
42d11e0a7a8b Convert.thy now in Isar, tuned
kleing
parents: 9580
diff changeset
   403
by (simp add: wt_method_def wtl_method_def)
9941
fe05af7ec816 renamed atts: rulify to rule_format, elimify to elim_format;
wenzelm
parents: 9906
diff changeset
   404
   (rule wt_imp_wtl_inst_list [rule_format, elim_format], auto simp add: wt_start_def) 
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   405
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   406
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   407
lemma wtl_method_complete:
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   408
  "wt_method G C pTs rT mxs mxl ins phi 
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   409
  ==> wtl_method G C pTs rT mxs mxl ins (make_cert ins phi)"
9580
kleing
parents: 9559
diff changeset
   410
proof -
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   411
  assume "wt_method G C pTs rT mxs mxl ins phi" 
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   412
  moreover
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   413
  have "fits ins (make_cert ins phi) phi"
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   414
    by (rule fits_make_cert)
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   415
  ultimately
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   416
  show ?thesis 
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   417
    by (rule fits_imp_wtl_method_complete)
9580
kleing
parents: 9559
diff changeset
   418
qed
9012
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   419
d1bd2144ab5d switched to Isar proofs
kleing
parents: 8388
diff changeset
   420
10628
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   421
theorem wtl_complete:
9757
1024a2d80ac0 functional LBV style, dead code, type safety -> Isar
kleing
parents: 9664
diff changeset
   422
  "wt_jvm_prog G Phi ==> wtl_jvm_prog G (make_Cert G Phi)"
10628
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   423
proof -
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   424
  assume wt: "wt_jvm_prog G Phi"
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   425
   
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   426
  { fix C S fs mdecls sig rT code
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   427
    assume "(C,S,fs,mdecls) \<in> set G" "(sig,rT,code) \<in> set mdecls"
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   428
    moreover
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   429
    from wt obtain wf_mb where "wf_prog wf_mb G" 
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   430
      by (blast dest: wt_jvm_progD)
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   431
    ultimately
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   432
    have "method (G,C) sig = Some (C,rT,code)"
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   433
      by (simp add: methd)
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   434
  } note this [simp]
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   435
 
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   436
  from wt
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   437
  show ?thesis
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   438
    apply (clarsimp simp add: wt_jvm_prog_def wtl_jvm_prog_def wf_prog_def wf_cdecl_def)
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   439
    apply (drule bspec, assumption)
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   440
    apply (clarsimp simp add: wf_mdecl_def)
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   441
    apply (drule bspec, assumption)
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   442
    apply (clarsimp simp add: make_Cert_def)
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   443
    apply (clarsimp dest!: wtl_method_complete)    
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   444
    done
10592
fc0b575a2cf7 BCV Integration
kleing
parents: 10496
diff changeset
   445
10628
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   446
qed   
4ea7f3e8e471 fixed and cleaned up wt[l]_jvm_prog proofs
kleing
parents: 10612
diff changeset
   447
      
9559
kleing
parents: 9549
diff changeset
   448
lemmas [simp] = split_paired_Ex
9549
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   449
40d64cb4f4e6 BV and LBV specified in terms of app and step functions
kleing
parents: 9376
diff changeset
   450
end