--- a/Admin/Benchmarks/HOL-datatype/ROOT.ML Fri Aug 27 12:57:55 2010 +0200
+++ b/Admin/Benchmarks/HOL-datatype/ROOT.ML Fri Aug 27 14:07:09 2010 +0200
@@ -5,11 +5,11 @@
val tests = ["Brackin", "Instructions", "SML", "Verilog"];
-Unsynchronized.set timing;
+timing := true;
-warning "\nset quick_and_dirty\n"; Unsynchronized.set quick_and_dirty;
+warning "\nset quick_and_dirty\n"; quick_and_dirty := true;
use_thys tests;
-warning "\nreset quick_and_dirty\n"; Unsynchronized.reset quick_and_dirty;
+warning "\nreset quick_and_dirty\n"; quick_and_dirty := false;
List.app Thy_Info.remove_thy tests;
use_thys tests;